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1.发明授权Method and apparatus for analog graphics sample clock frequency offset detection and verification 有权用于模拟图形采样时钟频偏检测和验证的方法和装置公开(公告)号：US07825990B2
公开(公告)日：2010-11-02
申请号：US11355815
申请日：2006-02-16
申请人： Bing Ouyang , John Michael Hayden , Troy Lane Ethridge , Anuradha Sundararajan , Larry D. Dickinson
发明人： Bing Ouyang , John Michael Hayden , Troy Lane Ethridge , Anuradha Sundararajan , Larry D. Dickinson
IPC分类号： H03M1/12
CPC分类号： H03M1/127 , G09G5/008 , H04N5/14 , H04N7/0122
摘要： A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.
摘要翻译： 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制，用于对模拟信号进行采样。 电路使用柱状帧差的周期作为柱状位置的函数来校正时钟频率。 采样时钟频率的变化取决于柱状差的周期。 对于时钟相位序列计算连续帧之间的差的第二个度量。 使用第二个测量的特性来验证时钟的频率。 特性可以是所选时钟相位上的第二个测量的最大值与最小值的比值。 可以使用其他特征，例如最大和最小测量的差。
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2.发明授权Method and apparatus for analog graphics sample clock frequency offset detection and verification 有权用于模拟图形采样时钟频偏检测和验证的方法和装置公开(公告)号：US08111330B2
公开(公告)日：2012-02-07
申请号：US12917685
申请日：2010-11-02
申请人： Bing Ouyang , John Michael Hayden , Troy Lane Ethridge , Anuradha Sundararajan , Larry D. Dickinson
发明人： Bing Ouyang , John Michael Hayden , Troy Lane Ethridge , Anuradha Sundararajan , Larry D. Dickinson
CPC分类号： H03M1/127 , G09G5/008 , H04N5/14 , H04N7/0122
摘要： A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.
摘要翻译： 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制，用于对模拟信号进行采样。 电路使用柱状帧差的周期作为柱状位置的函数来校正时钟频率。 采样时钟频率的变化取决于柱状差的周期。 对于时钟相位序列计算连续帧之间的差的第二个度量。 使用第二个测量的特性来验证时钟的频率。 特性可以是所选时钟相位上的第二个测量的最大值与最小值的比值。 可以使用其他特征，例如最大和最小测量的差。
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3.发明申请Method and Apparatus for Analog Graphics Sample Clock Frequency Offset Detection and Verification 有权模拟图形采样时钟频率偏移检测和验证的方法和装置公开(公告)号：US20110043700A1
公开(公告)日：2011-02-24
申请号：US12917685
申请日：2010-11-02
申请人： Bing Ouyang , John Michael Hayden , Troy Lane Ethridge , Anuradha Sundararajan , Larry D. Dickinson
发明人： Bing Ouyang , John Michael Hayden , Troy Lane Ethridge , Anuradha Sundararajan , Larry D. Dickinson
IPC分类号： H03M1/12
CPC分类号： H03M1/127 , G09G5/008 , H04N5/14 , H04N7/0122
摘要： A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.
摘要翻译： 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制，用于对模拟信号进行采样。 电路使用柱状帧差的周期作为柱状位置的函数来校正时钟频率。 采样时钟频率的变化取决于柱状差的周期。 对于时钟相位序列计算连续帧之间的差的第二个度量。 使用第二个测量的特性来验证时钟的频率。 特性可以是所选时钟相位上的第二个测量的最大值与最小值的比值。 可以使用其他特征，例如最大和最小测量的差。
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4.发明授权公开(公告)号：US07733424B2
公开(公告)日：2010-06-08
申请号：US11355789
申请日：2006-02-16
申请人： John Michael Hayden , Bing Ouyang , Troy Lane Ethridge , Anuradha Sundararajan , Larry D. Dickinson
发明人： John Michael Hayden , Bing Ouyang , Troy Lane Ethridge , Anuradha Sundararajan , Larry D. Dickinson
IPC分类号： H03M1/12
摘要： A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A measure of the difference between successive frames of the image is computed for a sequence of clock phases. The measure can be a count taken over pixels of the magnitude of the difference between a pixel in one frame and the corresponding pixel in a following frame exceeding a threshold value. The frequency of the clock is verified using a characteristic of the frame difference. The characteristic can be the ratio of the maximum measure to the minimum measure over the selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.
摘要翻译： 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制，用于对模拟信号进行采样。 对于时钟相位序列计算图像的连续帧之间的差异的度量。 该测量可以是对一帧中的像素与超过阈值的后续帧中的对应像素之间的差值的大小的像素进行的计数。 使用帧差的特性来验证时钟的频率。 特性可以是所选时钟相位上的最大测量与最小测量的比率。 可以使用其他特征，例如最大和最小测量的差。
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5.发明申请公开(公告)号：US20060274207A1
公开(公告)日：2006-12-07
申请号：US11355789
申请日：2006-02-16
摘要： A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A measure of the difference between successive frames of the image is computed for a sequence of clock phases. The measure can be a count taken over pixels of the magnitude of the difference between a pixel in one frame and the corresponding pixel in a following frame exceeding a threshold value. The frequency of the clock is verified using a characteristic of the frame difference. The characteristic can be the ratio of the maximum measure to the minimum measure over the selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.
摘要翻译： 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制，用于对模拟信号进行采样。 对于时钟相位序列计算图像的连续帧之间的差异的度量。 该测量可以是对一帧中的像素与超过阈值的后续帧中的对应像素之间的差值的大小的像素进行的计数。 使用帧差的特性来验证时钟的频率。 特性可以是所选时钟相位上的最大测量与最小测量的比率。 可以使用其他特征，例如最大和最小测量的差。
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6.发明申请Method and apparatus for analog graphics sample clock frequency offset detection and verification 有权用于模拟图形采样时钟频偏检测和验证的方法和装置公开(公告)号：US20060274194A1
公开(公告)日：2006-12-07
申请号：US11355815
申请日：2006-02-16
CPC分类号： H03M1/127 , G09G5/008 , H04N5/14 , H04N7/0122
摘要： A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.
摘要翻译： 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制，用于对模拟信号进行采样。 电路使用柱状帧差的周期作为柱状位置的函数来校正时钟频率。 采样时钟频率的变化取决于柱状差的周期。 对于时钟相位序列计算连续帧之间的差的第二个度量。 使用第二个测量的特性来验证时钟的频率。 特性可以是所选时钟相位上的第二个测量的最大值与最小值的比值。 可以使用其他特征，例如最大和最小测量的差。
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