公开(公告)号：US5453400A

公开(公告)日：1995-09-26

申请号：US6662

申请日：1993-01-19

申请人： John R. Abernathey ,  Randy W. Mann ,  Paul C. Parries ,  Julie A. Springer

发明人： John R. Abernathey ,  Randy W. Mann ,  Paul C. Parries ,  Julie A. Springer

IPC分类号： H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532

CPC分类号： H01L21/768 ,  H01L21/76895 ,  H01L23/53271 ,  H01L2924/0002

摘要： A method of forming interconnections of devices of integrated circuits, especially interconnecting spaced source/drain regions and/or gate regions, and the resulting structures are provided. An etch-stop material such as silicon dioxide is deposited over the entire substrate on which the devices are formed. A layer of silicon is deposited over etch-stop material, and the silicon is selectively etched to reveal the etch-stop material at the regions to be connected. The etch-stop material at those regions is then removed. Following this a high-conductivity material, which is either a refractory metal or a silicide formed from layers of silicon and a refractory metal, is formed on the substrate connecting the spaced regions.

摘要翻译： 提供了形成集成电路器件的互连的方法，特别是互连间隔开的源极/漏极区域和/或栅极区域以及所得到的结构。 诸如二氧化硅的蚀刻停止材料沉积在其上形成器件的整个衬底上。 一层硅沉积在蚀刻停止材料上，并且硅被选择性地蚀刻以在要连接的区域上露出蚀刻停止材料。 然后去除那些区域处的蚀刻停止材料。 此后，在连接间隔开的区域的基板上形成高导电性材料，其是由硅层和难熔金属形成的难熔金属或硅化物。