Abstract:
A polarization switching device includes a lower panel; an upper panel facing the lower panel; a liquid crystal layer disposed between the lower panel and the upper panel; and a driver to apply a first driving voltage and a second driving voltage to the lower panel and the upper panel, respectively, the first driving voltage to transition among a center voltage, a first voltage and a second voltage. The first voltage and the second voltage have the same difference in value from the center voltage. The driver includes a voltage changing unit to generate the first voltage and the second voltage based on a digital data input to a first digital-analog converter.
Abstract:
A backlight unit, and a display device having the backlight unit, includes a light source, the light source formed to directly illuminate a display panel, and an optical plate arranged over the light source, wherein the optical plate includes a first surface and a second surface that faces the first surface, and the first surface is different in height from the second surface.
Abstract:
A driving device includes an output timing controller which controls an output timing of a first driving voltage and a second driving voltage respectively generated from a first voltage generator and a second voltage generator. A third driving voltage output from the output timing controller is provided to a first data driver and a second data driver, and also provided to a gamma voltage generator to generate a plurality of gamma voltages. Accordingly, a reverse electric potential between the third driving voltage and the gamma voltages is prevented from being generated in the first and second data drivers, therefore, preventing the first and second data drivers from being damaged.
Abstract:
A method of controlling timing signals includes; selectively providing both master control data and slave control data, which are included in control data, to a memory part based on a write enable signal provided form an external device, reading control data stored in the memory part in response to a reset signal provided from an external device, and controlling output timing of at least one power voltage based on the stored control data.