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    Methods of manufacturing semiconductor device
    2.
    发明授权
    Methods of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US08691693B2

    公开(公告)日：2014-04-08

    申请号：US13290285

    申请日：2011-11-07

    申请人： Sang-Jin Kim ,  Jong-Chan Shin ,  Yong-Kug Bae ,  Do-Hyoung Kim ,  Dong-Woon Park

    发明人： Sang-Jin Kim ,  Jong-Chan Shin ,  Yong-Kug Bae ,  Do-Hyoung Kim ,  Dong-Woon Park

    IPC分类号： H01L21/44 ,  H01L29/40

    CPC分类号： H01L21/76895 ,  H01L21/28518 ,  H01L21/31144 ,  H01L21/76897 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823481 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

    摘要： In a method of manufacturing a semiconductor device, a first etching mask and a second etching mask are formed sequentially on a metal gate structure on a substrate and a first insulating interlayer covering a sidewall of the metal gate structure respectively. An opening is formed to expose a top surface of the substrate by removing a portion of the first insulating interlayer not overlapped with the first etching mask or the second etching mask. A metal silicide pattern is formed on the exposed top surface of the substrate. A plug on the metal silicide pattern is formed to fill a remaining portion of the opening. Further, a planarization layer may be used as the second etching mask.

    摘要翻译： 在制造半导体器件的方法中，依次在基板上的金属栅极结构和覆盖金属栅极结构的侧壁的第一绝缘夹层上形成第一蚀刻掩模和第二蚀刻掩模。 通过除去与第一蚀刻掩模或第二蚀刻掩模不重叠的第一绝缘夹层的一部分，形成开口以暴露基板的顶表面。 在衬底的暴露的顶表面上形成金属硅化物图案。 形成金属硅化物图案上的塞子以填充开口的剩余部分。 此外，可以使用平坦化层作为第二蚀刻掩模。

    Method of manufacturing a semiconductor device
    3.
    发明授权
    Method of manufacturing a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US08563383B2

    公开(公告)日：2013-10-22

    申请号：US13252621

    申请日：2011-10-04

    申请人： Sang-Jin Kim ,  Jong-Chan Shin ,  Yong-Kug Bae ,  Myeong-Cheol Kim ,  Do-Hyoung Kim

    发明人： Sang-Jin Kim ,  Jong-Chan Shin ,  Yong-Kug Bae ,  Myeong-Cheol Kim ,  Do-Hyoung Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L21/823425 ,  H01L21/823437 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/7834

    摘要： A method of manufacturing a semiconductor device includes forming a plurality of gate structures including a metal on a substrate having an isolation layer, forming first insulating interlayer patterns covering sidewalls of the gate structures, forming first capping layer patterns and a second capping layer pattern on the gate structures and the first insulating interlayer patterns, the first capping layer patterns covering upper faces of the gate structures, and the second capping layer pattern overlapping the isolation layer, partially removing the first insulating interlayer patterns using the first and the second capping layer patterns as etching masks to form first openings that expose portions of the substrate, forming metal silicide patterns on the portions of the substrate exposed in the forming of the first openings, and forming conductive structures on the metal silicide patterns.

    摘要翻译： 制造半导体器件的方法包括在具有隔离层的衬底上形成包括金属的多个栅极结构，形成覆盖栅极结构的侧壁的第一绝缘层间图案，形成第一覆盖层图案和第二覆盖层图案 栅极结构和第一绝缘层间图案，第一覆盖层图案覆盖栅极结构的上表面，第二覆盖层图案与隔离层重叠，使用第一和第二覆盖层图案部分地去除第一绝缘层间图案，如 蚀刻掩模以形成暴露基板部分的第一开口，在形成第一开口的裸露部分上形成金属硅化物图案，并在金属硅化物图案上形成导电结构。

    METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE
    4.
    发明申请
    METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号：US20120122286A1

    公开(公告)日：2012-05-17

    申请号：US13290285

    申请日：2011-11-07

    申请人： Sang-Jin Kim ,  Jong-Chan Shin ,  Yong-Kug Bae ,  Do-Hyoung Kim ,  Dong-Woon Park

    发明人： Sang-Jin Kim ,  Jong-Chan Shin ,  Yong-Kug Bae ,  Do-Hyoung Kim ,  Dong-Woon Park

    IPC分类号： H01L21/336 ,  H01L21/768

    CPC分类号： H01L21/76895 ,  H01L21/28518 ,  H01L21/31144 ,  H01L21/76897 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823481 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

    摘要： In a method of manufacturing a semiconductor device, a first etching mask and a second etching mask are formed sequentially on a metal gate structure on a substrate and a first insulating interlayer covering a sidewall of the metal gate structure respectively. An opening is formed to expose a top surface of the substrate by removing a portion of the first insulating interlayer not overlapped with the first etching mask or the second etching mask. A metal silicide pattern is formed on the exposed top surface of the substrate. A plug on the metal silicide pattern is formed to fill a remaining portion of the opening. Further, a planarization layer may be used as the second etching mask.

    摘要翻译： 在制造半导体器件的方法中，依次在基板上的金属栅极结构和覆盖金属栅极结构的侧壁的第一绝缘夹层上形成第一蚀刻掩模和第二蚀刻掩模。 通过除去与第一蚀刻掩模或第二蚀刻掩模不重叠的第一绝缘夹层的一部分，形成开口以暴露基板的顶表面。 在衬底的暴露的顶表面上形成金属硅化物图案。 形成金属硅化物图案上的塞子以填充开口的剩余部分。 此外，可以使用平坦化层作为第二蚀刻掩模。

    Ink-jet head and method for manufacturing the same
    7.
    发明授权
    Ink-jet head and method for manufacturing the same 有权
    喷墨头及其制造方法

    公开(公告)号：US08141989B2

    公开(公告)日：2012-03-27

    申请号：US12505291

    申请日：2009-07-17

    申请人： Sang-Jin Kim ,  Young-Seuck Yoo

    发明人： Sang-Jin Kim ,  Young-Seuck Yoo

    IPC分类号： B41J2/045

    CPC分类号： B41J2/161 ,  B41J2/1629

    摘要： An ink-jet head and a method for manufacturing the ink-jet head are disclosed. The ink-jet head can include: a chamber, which may house a type of ink; a membrane, which may be formed on one side of the chamber, and in a surface of which a holding cavity may be formed; a lower electrode, formed on an inner surface of the holding cavity; and a piezoelectric component, held in the holding cavity. According to certain embodiments of the invention, the ink-jet head can be formed with thin-film type actuators, and the electrical properties of the ink-jet head can be improved.

    摘要翻译： 公开了喷墨头和喷墨头的制造方法。 喷墨头可以包括：可容纳一种油墨的室; 膜可以形成在室的一侧上，并且在其表面中可以形成保持腔; 形成在所述保持腔的内表面上的下电极; 以及保持在保持腔中的压电元件。 根据本发明的某些实施例，喷墨头可以由薄膜型致动器形成，并且可以提高喷墨头的电气特性。

    Negative active material for rechargeable lithium battery and method of preparing same
    10.
    发明授权
    Negative active material for rechargeable lithium battery and method of preparing same 有权
    可充电锂电池负极活性物质及其制备方法

    公开(公告)号：US07485395B2

    公开(公告)日：2009-02-03

    申请号：US10743910

    申请日：2003-12-24

    申请人： Sang-Jin Kim ,  Kyou-Yoon Sheem ,  Joon-Sup Kim

    发明人： Sang-Jin Kim ,  Kyou-Yoon Sheem ,  Joon-Sup Kim

    IPC分类号： H01M4/58 ,  H01M4/60

    CPC分类号： H01M4/583 ,  H01M4/133 ,  H01M4/1393 ,  H01M10/0525 ,  H01M2004/021

    摘要： A negative active material of a rechargeable lithium battery includes a crystalline carbon core having an intensity ratio Ra I(1360)/I(1580) of a Raman Spectroscopy peak intensity I(1360) at a (1360) plane to an Raman Spectroscopy peak intensity I(1580) at a (1580) plane of 0.01 to 0.45 and a shell with a turbostratic or half-onion ring structure coated on the core, the shell including crystalline micro-particles and a semi-crystalline carbon, the shell having an intensity ratio Ra I(1360)/I(1580) of a Raman Spectroscopy peak intensity I(1360) at a (1360) plane to a Raman Spectroscopy peak intensity I(1580) at a (1580) plane of 0.46 to 1.5.

    摘要翻译： 可再充电锂电池的负极活性物质包括在（1360）面上的拉曼光谱峰强度I（1360）与拉曼光谱峰强度的强度比Ra I（1360）/ I（1580）的结晶碳芯 I（1580）在0.01至0.45的（1580）平面上，并且具有涂覆在芯上的涡旋或半洋葱环结构的壳，壳包含结晶微粒和半结晶碳，壳具有强度 （1360）处的拉曼光谱峰强度I（1360）与（1580）平面处的拉曼光谱峰强度I（1580）的比值Ra I（1360）/ I（1580）为0.46〜1.5。