公开(公告)号：US20090230481A1

公开(公告)日：2009-09-17

申请号：US12401693

申请日：2009-03-11

申请人： Jong-ho Park ,  Chang-ki Jeon ,  Kyijeong Park

发明人： Jong-ho Park ,  Chang-ki Jeon ,  Kyijeong Park

IPC分类号： H01L27/06 ,  H01L21/60 ,  H01L21/28 ,  H01L21/70

CPC分类号： H01L21/8249 ,  H01L21/2256 ,  H01L21/823814 ,  H01L27/0623

摘要： Provided are a semiconductor device including a source/drain and a gate formed using a doped polysilicon process, and a method of fabricating the semiconductor device. The method comprises: forming a gate insulating layer on a part of an active region on a first conductivity type epitaxial layer; forming a conductive layer on the epitaxial layer; implanting high concentration impurities of a second conductivity type a first portion of the conductive layer on the gate insulating layer and second portions of the conductive layer on both sides of the first insulating layer; patterning the conductive layer; forming a second insulating layer on the epitaxial layer and high concentration impurity regions of the second conductivity type below the second conductive pattern; and implanting low-concentration impurities of the second conductivity type into the epitaxial layer between a gate structure and the high concentration impurity regions.

摘要翻译： 提供了包括使用掺杂多晶硅工艺形成的源极/漏极和栅极的半导体器件，以及制造半导体器件的方法。 该方法包括：在第一导电型外延层的有源区的一部分上形成栅极绝缘层; 在外延层上形成导电层; 将第二导电类型的高浓度杂质注入到第一绝缘层的栅绝缘层上的导电层的第一部分和导电层的第二部分上; 图案化导电层; 在所述外延层上形成第二绝缘层，在所述第二导电图案之下形成所述第二导电类型的高浓度杂质区; 以及将第二导电类型的低浓度杂质注入到栅极结构和高浓度杂质区之间的外延层中。