公开(公告)号：US20080169470A1

公开(公告)日：2008-07-17

申请号：US12003626

申请日：2007-12-28

申请人： Joo Soo Lim ,  Hyun Seok Hong ,  Chang Bin Lee

发明人： Joo Soo Lim ,  Hyun Seok Hong ,  Chang Bin Lee

IPC分类号： H01L33/00 ,  H01L21/00

CPC分类号： H01L27/1288 ,  G02F1/136227 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/1214 ,  H01L2924/0002 ,  H01L2924/00

摘要： A thin film transistor (TFT) array substrate and a method of manufacturing the same that is capable of decreasing the number of usage of exposure masks to reduce the process time and the process costs and excessively etching a passivation film below a photoresist pattern to easily perform a lift-off process of the photoresist pattern are disclosed. The TFT array substrate includes a gate line layer including a gate line formed on a substrate, a gate electrode diverging from the gate line, and a gate pad formed at the end of the gate line, a gate insulation film formed on the gate line layer, a semiconductor layer formed on the gate insulation film above the gate electrode, a data line layer including a data line intersecting the gate line, source and drain electrodes formed at opposite sides of the semiconductor layer, and a data pad formed at the end of the data line, a pixel electrode contacting the drain electrode, first and second oxidation preventing films contacting the gate pad and the data pad, and an at least two-layered passivation film deposited on the data line layer. The uppermost layer of the at least two-layered passivation film is formed at the remaining region excluding a region where the pixel electrode and the first and second oxidation preventing films are formed.

摘要翻译： 一种薄膜晶体管（TFT）阵列基板及其制造方法，其能够减少曝光掩模的使用次数以减少处理时间和处理成本，并且过度地蚀刻光致抗蚀剂图案之下的钝化膜以容易地执行 公开了光致抗蚀剂图案的剥离过程。 TFT阵列基板包括栅极线层，栅极线包括形成在基板上的栅极线，从栅极线发散的栅电极和形成在栅极线的端部的栅极焊盘，形成在栅极线层上的栅极绝缘膜 形成在栅极电极上方的栅极绝缘膜上的半导体层，包括与栅极线交叉的数据线的数据线层，形成在半导体层的相对侧的源极和漏极;以及形成在栅极绝缘膜的末端的数据焊盘 数据线，与漏电极接触的像素电极，与栅极焊盘和数据焊盘接触的第一和第二氧化防止膜以及沉积在数据线层上的至少两层钝化膜。 至少两层钝化膜的最上层形成在除了形成像素电极和第一和第二氧化防止膜的区域之外的剩余区域。

公开(公告)号：US08110830B2

公开(公告)日：2012-02-07

申请号：US12003626

申请日：2007-12-28

申请人： Joo Soo Lim ,  Hyun Seok Hong ,  Chang Bin Lee

发明人： Joo Soo Lim ,  Hyun Seok Hong ,  Chang Bin Lee

IPC分类号： H01L21/00 ,  H01L33/00

CPC分类号： H01L27/1288 ,  G02F1/136227 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/1214 ,  H01L2924/0002 ,  H01L2924/00

摘要： A thin film transistor (TFT) array substrate and a method of manufacturing the same that is capable of decreasing the number of usage of exposure masks to reduce the process time and the process costs and excessively etching a passivation film below a photoresist pattern to easily perform a lift-off process of the photoresist pattern are disclosed. The TFT array substrate includes a gate line layer including a gate line formed on a substrate, a gate electrode diverging from the gate line, and a gate pad formed at the end of the gate line, a gate insulation film formed on the gate line layer, a semiconductor layer formed on the gate insulation film above the gate electrode, a data line layer including a data line intersecting the gate line, source and drain electrodes formed at opposite sides of the semiconductor layer, and a data pad formed at the end of the data line, a pixel electrode contacting the drain electrode, first and second oxidation preventing films contacting the gate pad and the data pad, and an at least two-layered passivation film deposited on the data line layer. The uppermost layer of the at least two-layered passivation film is formed at the remaining region excluding a region where the pixel electrode and the first and second oxidation preventing films are formed.

摘要翻译： 一种薄膜晶体管（TFT）阵列基板及其制造方法，其能够减少曝光掩模的使用次数以减少处理时间和处理成本，并且过度地蚀刻光致抗蚀剂图案之下的钝化膜以容易地执行 公开了光致抗蚀剂图案的剥离过程。 TFT阵列基板包括栅极线层，栅极线包括形成在基板上的栅极线，从栅极线发散的栅电极和形成在栅极线的端部的栅极焊盘，形成在栅极线层上的栅极绝缘膜 形成在栅极电极上方的栅极绝缘膜上的半导体层，包括与栅极线交叉的数据线的数据线层，形成在半导体层的相对侧的源极和漏极;以及形成在栅极绝缘膜的末端的数据焊盘 数据线，与漏电极接触的像素电极，与栅极焊盘和数据焊盘接触的第一和第二氧化防止膜以及沉积在数据线层上的至少两层钝化膜。 至少两层钝化膜的最上层形成在除了形成像素电极和第一和第二氧化防止膜的区域之外的剩余区域。

公开(公告)号：US07408597B2

公开(公告)日：2008-08-05

申请号：US11269817

申请日：2005-11-09

申请人： Ji No Lee ,  Hee Young Kwack ,  Chang Bin Lee

发明人： Ji No Lee ,  Hee Young Kwack ,  Chang Bin Lee

IPC分类号： G02F1/136

CPC分类号： G02F1/136227 ,  G02F1/13458 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/1288

摘要： A liquid crystal display device according to the present invention includes a gate line on a substrate; a data line crossing the gate line with a gate insulating film to define a pixel area; a thin film transistor connected to the gate line and the data line; a semiconductor pattern overlapped along the data line; a double layer passivation film covering the data line and the thin film transistor, wherein layers of the passivation film have different etching rates; and a pixel electrode formed in a pixel hole penetrating an upper passivation film of the double layer passivation film and connected to a drain electrode of the thin film transistor exposed through a drain contact hole, the pixel electrode forming a border with the upper passivation film surrounding the pixel hole.

摘要翻译： 根据本发明的液晶显示装置包括在基板上的栅极线; 与栅极线交叉的数据线与栅极绝缘膜以限定像素区域; 连接到栅极线和数据线的薄膜晶体管; 半导体图案沿数据线重叠; 覆盖数据线和薄膜晶体管的双层钝化膜，其中钝化膜的层具有不同的蚀刻速率; 以及像素电极，其形成在贯穿双层钝化膜的上钝化膜的像素孔中，并连接到通过漏极接触孔露出的薄膜晶体管的漏电极，所述像素电极与上周钝化膜形成边界 像素孔。