公开(公告)号：US07487503B2

公开(公告)日：2009-02-03

申请号：US10916976

申请日：2004-08-12

申请人： Jos Manuel Accapadi ,  Mathew Accapadi ,  Andrew Dunshea ,  Mark Elliott Hack ,  Agustin Mena, III ,  Mysore Sathyanarayana Srinivas

发明人： Jos Manuel Accapadi ,  Mathew Accapadi ,  Andrew Dunshea ,  Mark Elliott Hack ,  Agustin Mena, III ,  Mysore Sathyanarayana Srinivas

IPC分类号： G06F9/46 ,  G06F13/24

CPC分类号： G06F9/5027 ,  G06F9/4812

摘要： Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.

摘要翻译： 提供方法，系统和计算机程序产品用于在多处理器计算机中调度线程。 实施例包括选择要发送到处理器的准备队列中的线程，并且确定是否在与线程相关联的线程控制块中设置了中断屏蔽标志。 如果在与线程相关联的线程控制块中设置中断屏蔽标志，则实施例通常包括选择处理器，将所选择的处理器的当前处理器优先级寄存器设置为最不利，并将线程从就绪队列调度到所选择的处理器 。 在一些实施例中，将所选择的处理器的当前处理器优先级寄存器设置为最不利的是通过在当前处理器优先级寄存器中存储与最高中断优先级相关联的值来执行。

公开(公告)号：US20120260257A1

公开(公告)日：2012-10-11

申请号：US13528645

申请日：2012-06-20

申请人： Jos Manuel Accapadi ,  Mathew Accapadi ,  Andrew Dunshea ,  Mark Elliott Hack ,  Agustin Mena, III ,  Mysore Sathyanarayana Srinivas

发明人： Jos Manuel Accapadi ,  Mathew Accapadi ,  Andrew Dunshea ,  Mark Elliott Hack ,  Agustin Mena, III ,  Mysore Sathyanarayana Srinivas

IPC分类号： G06F9/46 ,  G06F13/24

CPC分类号： G06F9/5027 ,  G06F9/4812

摘要： A computer program product for scheduling threads in a multiprocessor computer comprises computer program instructions configured to select a thread in a ready queue to be dispatched to a processor and determine whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, the computer program instructions are configured to select a processor, set a current processor priority register of the selected processor to least favored, and dispatch the thread from the ready queue to the selected processor.

摘要翻译： 一种用于在多处理器计算机中调度线程的计算机程序产品包括计算机程序指令，其被配置为选择准备队列中的线程以分派到处理器，并且确定是否在与线程相关联的线程控制块中设置了中断屏蔽标志。 如果在与线程相关联的线程控制块中设置了中断屏蔽标志，则将计算机程序指令配置为选择处理器，将所选处理器的当前处理器优先级寄存器设置为最不利，并将线程从就绪队列 到所选择的处理器。

公开(公告)号：US07962913B2

公开(公告)日：2011-06-14

申请号：US12342352

申请日：2008-12-23

申请人： Jos Manuel Accapadi ,  Mathew Accapadi ,  Andrew Dunshea ,  Mark Elliott Hack ,  Agustin Mena, III ,  Mysore Sathyanarayana Srinivas

发明人： Jos Manuel Accapadi ,  Mathew Accapadi ,  Andrew Dunshea ,  Mark Elliott Hack ,  Agustin Mena, III ,  Mysore Sathyanarayana Srinivas

IPC分类号： G06F9/46 ,  G06F13/24

CPC分类号： G06F9/5027 ,  G06F9/4812

摘要： Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.

摘要翻译： 提供方法，系统和计算机程序产品用于在多处理器计算机中调度线程。 实施例包括选择要发送到处理器的准备队列中的线程，并且确定是否在与线程相关联的线程控制块中设置了中断屏蔽标志。 如果在与线程相关联的线程控制块中设置中断屏蔽标志，则实施例通常包括选择处理器，将所选择的处理器的当前处理器优先级寄存器设置为最不利，并将线程从就绪队列调度到所选择的处理器 。 在一些实施例中，将所选择的处理器的当前处理器优先级寄存器设置为最不利的是通过在当前处理器优先级寄存器中存储与最高中断优先级相关联的值来执行。

公开(公告)号：US20080184246A1

公开(公告)日：2008-07-31

申请号：US12059461

申请日：2008-03-31

申请人： Jos Manuel Accapadi ,  Mathew Accapadi ,  Andrew Dunshea ,  Mark Elliott Hack ,  Agustin Mena ,  Mysore Sathyanarayana Srinivas

发明人： Jos Manuel Accapadi ,  Mathew Accapadi ,  Andrew Dunshea ,  Mark Elliott Hack ,  Agustin Mena ,  Mysore Sathyanarayana Srinivas

IPC分类号： G06F9/46

CPC分类号： G06F9/5027 ,  G06F9/4812

摘要： Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.

摘要翻译： 提供方法，系统和计算机程序产品用于在多处理器计算机中调度线程。 实施例包括选择要发送到处理器的准备队列中的线程，并且确定是否在与线程相关联的线程控制块中设置了中断屏蔽标志。 如果在与线程相关联的线程控制块中设置中断屏蔽标志，则实施例通常包括选择处理器，将所选择的处理器的当前处理器优先级寄存器设置为最不利，并将线程从就绪队列调度到所选择的处理器 。 在一些实施例中，将所选择的处理器的当前处理器优先级寄存器设置为最不利的是通过在当前处理器优先级寄存器中存储与最高中断优先级相关联的值来执行。

公开(公告)号：US07676808B2

公开(公告)日：2010-03-09

申请号：US11955503

申请日：2007-12-13

申请人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Dirk Michel ,  Mysore Sathyanarayana Srinivas

发明人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Dirk Michel ,  Mysore Sathyanarayana Srinivas

IPC分类号： G06F9/46

CPC分类号： G06F9/5083

摘要： A system and method for scheduling threads in a Simultaneous Multithreading (SMT) processor environment utilizing multiple SMT processors is provided. Poor performing threads that are being run on each of the SMT processors are identified. After being identified, the poor performing threads are moved to a different SMT processor. Data is captured regarding the performance of threads. In one embodiment, this data includes each threads' CPI value. When a thread is moved, data regarding the thread and its performance at the time it was moved is recorded along with a timestamp. The data regarding previous moves is used to determine whether a thread's performance is improved following the move.

摘要翻译： 提供了一种利用多个SMT处理器的同时多线程（SMT）处理器环境中调度线程的系统和方法。 识别在每个SMT处理器上运行的执行不良线程。 被识别后，执行不良的线程被移动到不同的SMT处理器。 捕获关于线程性能的数据。 在一个实施例中，该数据包括每个线程的CPI值。 当线程移动时，与线程及其在移动时的性能相关的数据与时间戳一起被记录。 关于先前移动的数据用于确定线程的性能是否随着移动而改善。

公开(公告)号：US07318142B2

公开(公告)日：2008-01-08

申请号：US11463100

申请日：2006-08-08

申请人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Li Li ,  Grover Herbert Neuman ,  Mysore Sathyanarayana Srinivas ,  David Alan Hepkin

发明人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Li Li ,  Grover Herbert Neuman ,  Mysore Sathyanarayana Srinivas ,  David Alan Hepkin

IPC分类号： G06F12/06

CPC分类号： G06F12/023

摘要： A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).

摘要翻译： 提供了一种基于当前系统内存条件动态更改虚拟内存管理器（VMM）顺序访问预读设置的系统和方法。 使用用户设置的顺序访问读取前值可以执行正常的VMM操作。 当检测到低内存时，系统会根据自由空间量是否很低或已经达到极低的水平，关闭顺序访问预读操作或者减小最大页面前提（maxpgahead）值。 改变的VMM顺序访问预读状态在有足够的可用空间可用之前保持有效，以便可以执行正常的VMM顺序访问预读操作（此时，改变的顺序访问读取前置值被重置为其原始级别） 。

公开(公告)号：US07360218B2

公开(公告)日：2008-04-15

申请号：US10671132

申请日：2003-09-25

申请人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Dirk Michel ,  Mysore Sathyanarayana Srinivas

发明人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Dirk Michel ,  Mysore Sathyanarayana Srinivas

IPC分类号： G06F9/455 ,  G06F9/46 ,  G06F9/00 ,  G06F9/30

CPC分类号： G06F9/4881 ,  G06F2209/483

摘要： A system and method for identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.

摘要翻译： 通过计算在SMT处理器上运行两个线程时发生的性能指标（例如每个指令周期（CPI）），可以提供用于在同时多线程（SMT）处理器环境中识别兼容线程的系统和方法。 确定在两个线程在SMT处理器上执行时实现的CPI。 如果实现的CPI优于兼容性阈值，则记录指示兼容性的信息。 当线程即将完成时，调度程序将查看完成线程所属的运行队列，以调度另一个线程。 调度程序标识（1）与SMT处理器上仍然运行的线程（即，即将完成的线程）兼容的线程，以及（2）准备执行。 持续更新CPI数据，以便不断地识别彼此兼容的线程。

公开(公告)号：US07120753B2

公开(公告)日：2006-10-10

申请号：US10828455

申请日：2004-04-20

申请人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Li Li ,  Grover Herbert Neuman ,  Mysore Sathyanarayana Srinivas ,  David Alan Hepkin

发明人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Li Li ,  Grover Herbert Neuman ,  Mysore Sathyanarayana Srinivas ,  David Alan Hepkin

IPC分类号： G06F12/00 ,  G06F9/38

CPC分类号： G06F12/023

摘要： A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).

摘要翻译： 提供了一种基于当前系统内存条件动态更改虚拟内存管理器（VMM）顺序访问预读设置的系统和方法。 使用用户设置的顺序访问读取前值可以执行正常的VMM操作。 当检测到低内存时，系统会根据自由空间量是否很低或已经达到极低的水平，关闭顺序访问预读操作或者减小最大页面前提（maxpgahead）值。 改变的VMM顺序访问预读状态在有足够的可用空间可用之前保持有效，以便可以执行正常的VMM顺序访问预读操作（此时，改变的顺序访问读取前置值被重置为其原始级别） 。

公开(公告)号：US07698707B2

公开(公告)日：2010-04-13

申请号：US12036804

申请日：2008-02-25

申请人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Dirk Michel ,  Mysore Sathyanarayana Srinivas

发明人： Jos Manuel Accapadi ,  Andrew Dunshea ,  Dirk Michel ,  Mysore Sathyanarayana Srinivas

IPC分类号： G06F9/30 ,  G06F9/46

CPC分类号： G06F9/4881 ,  G06F2209/483

摘要： Identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.

摘要翻译： 通过计算在SMT处理器上运行两个线程时发生的性能指标（例如每个指令周期（CPI））来提供在同时多线程（SMT）处理器环境中识别兼容线程。 确定在两个线程在SMT处理器上执行时实现的CPI。 如果实现的CPI优于兼容性阈值，则记录指示兼容性的信息。 当线程即将完成时，调度程序将查看完成线程所属的运行队列，以调度另一个线程。 调度程序标识（1）与SMT处理器上仍然运行的线程（即，即将完成的线程）兼容的线程，以及（2）准备执行。 持续更新CPI数据，以便不断地识别彼此兼容的线程。

公开(公告)号：US20090106762A1

公开(公告)日：2009-04-23

申请号：US12342352

申请日：2008-12-23

申请人： Jos Manuel Accapadi ,  Matthew Accapadi ,  Andrew Dunshea ,  Mark Elliot Hack ,  Augustin Mena, III ,  Mysore Sathyanarayana Srinivas

发明人： Jos Manuel Accapadi ,  Matthew Accapadi ,  Andrew Dunshea ,  Mark Elliot Hack ,  Augustin Mena, III ,  Mysore Sathyanarayana Srinivas

IPC分类号： G06F9/46

CPC分类号： G06F9/5027 ,  G06F9/4812

摘要： Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.

摘要翻译： 提供方法，系统和计算机程序产品用于在多处理器计算机中调度线程。 实施例包括选择要发送到处理器的准备队列中的线程，并且确定是否在与线程相关联的线程控制块中设置了中断屏蔽标志。 如果在与线程相关联的线程控制块中设置中断屏蔽标志，则实施例通常包括选择处理器，将所选择的处理器的当前处理器优先级寄存器设置为最不利，并将线程从就绪队列调度到所选择的处理器 。 在一些实施例中，将所选择的处理器的当前处理器优先级寄存器设置为最不利的是通过在当前处理器优先级寄存器中存储与最高中断优先级相关联的值来执行。