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    Design for manufacturability
    1.
    发明申请
    Design for manufacturability 审中-公开
    可制造性设计

    公开(公告)号：US20050015740A1

    公开(公告)日：2005-01-20

    申请号：US10827990

    申请日：2004-04-19

    申请人： Joseph Sawicki ,  Laurence Grodd ,  John Ferguson ,  Sanjay Dhar

    发明人： Joseph Sawicki ,  Laurence Grodd ,  John Ferguson ,  Sanjay Dhar

    IPC分类号： G06F20060101 ,  G06F9/455 ,  G06F15/00 ,  G06F17/50

    CPC分类号： G06F17/50 ,  G05B2219/35028 ,  G05B2219/45028 ,  G06F2217/12 ,  Y02P90/265

    摘要： Techniques are disclosed for modifying an existing microdevice design to improve its manufacturability. With these techniques, a designer receives manufacturing criteria associated with data in a design. The associated design data then is identified and provided to the microdevice designer, who may choose to modify the design based upon the manufacturing criteria. In this manner, the designer can directly incorporate manufacturing criteria from the foundry in the original design of the microdevice.

    摘要翻译： 公开了用于修改现有微设计设计以提高其可制造性的技术。 利用这些技术，设计者接收与设计中的数据相关的制造标准。 然后，相关联的设计数据被识别并提供给微设计者，他们可以根据制造标准选择修改设计。 以这种方式，设计人员可以直接在微型设备的原始设计中纳入铸造厂的制造标准。

    Defect location identification for microdevice manufacturing and test
    3.
    发明申请
    Defect location identification for microdevice manufacturing and test 审中-公开
    微型设备制造和测试缺陷位置识别

    公开(公告)号：US20060069958A1

    公开(公告)日：2006-03-30

    申请号：US11126069

    申请日：2005-05-09

    申请人： Joseph Sawicki ,  John Ferguson ,  Sanjay Dhar ,  Juan Andres Robles ,  Janusz Rajski

    发明人： Joseph Sawicki ,  John Ferguson ,  Sanjay Dhar ,  Juan Andres Robles ,  Janusz Rajski

    IPC分类号： G06F11/00

    CPC分类号： G06F17/50 ,  G01R31/318357 ,  G06F11/263 ,  G06F2217/14 ,  G06F2217/74

    摘要： A defect identification tool is disclosed that predicts locations at which defects in a microdevice are most likely to occur. The tool may identify both a type of defect and the particular netlists in which that defect is likely to occur. A test circuit generation tool can then subsequently use this defect information to generate a test circuit that tests for the defect in the identified portions of the microcircuit. Similarly, an automatic test pattern generation tool may use the defect location information to generate test data custom-tailored to check for faults corresponding to the identified defect in the specified portions of the microcircuit. Various implementations of the tool may be used both to identify the locations at which defects caused by systematic errors, such as manufacturing process deficiencies or flaws, are most likely to occur and the locations at which randomly-created defects are most likely to occur.

    摘要翻译： 公开了一种缺陷识别工具，其预测微设备中最有可能发生缺陷的位置。 该工具可以识别缺陷的类型和可能发生缺陷的特定网表。 然后，测试电路生成工具随后可以使用该缺陷信息来生成测试电路，该测试电路测试微电路的识别部分中的缺陷。 类似地，自动测试图形生成工具可以使用缺陷位置信息来生成定制的测试数据，以检查与微电路的指定部分中的所识别的缺陷相对应的故障。 工具的各种实现可以用于识别由系统错误（诸如制造过程缺陷或缺陷）最可能发生的缺陷以及随机创建的缺陷最可能发生的位置的位置。