Fastening device for a purge ring
    1.
    发明授权
    Fastening device for a purge ring 有权
    用于清洗环的紧固装置

    公开(公告)号:US06223447B1

    公开(公告)日:2001-05-01

    申请号:US09504288

    申请日:2000-02-15

    IPC分类号: F26B1724

    CPC分类号: H01L21/68721 H01L21/68735

    摘要: A fastening device which prevents rotational and vertical displacement of a purge ring caused by purge gas exiting the purge ring or caused by other processing conditions. The fastening device comprises a clamp which releasably holds the purge ring together with the wafer support. A pin is inserted into a bore through the purge ring, wafer support and the clamp to releasably secure the clamp in place. Slots may be formed in the purge ring to guide placement of the clamp.

    摘要翻译: 一种紧固装置,其防止由吹扫气体离开吹扫环或由其它加工条件引起的清洗环的旋转和垂直位移。 紧固装置包括可拆卸地将清洗环与晶片支撑件一起保持的夹具。 销通过清洗环,晶片支架和夹具插入孔中,以将夹具可释放地固定到位。 槽可以形成在清洗环中以引导夹具的放置。

    Method of treating HIV infection in atazanavir-resistant patients using a combination of atazanavir and another protease inhibitor
    2.
    发明申请
    Method of treating HIV infection in atazanavir-resistant patients using a combination of atazanavir and another protease inhibitor 审中-公开
    使用阿扎那韦和另一种蛋白酶抑制剂的组合治疗阿扎那韦耐药患者的HIV感染的方法

    公开(公告)号:US20050148523A1

    公开(公告)日:2005-07-07

    申请号:US11011226

    申请日:2004-12-13

    摘要: A method of treating HIV infection in a human patient wherein the infecting HIV strain has become resistant to atazanavir, the method comprising administration of a therapeutically effective amount of a combination of atazanavir or a pharmaceutically acceptable salt thereof, and at least one other HIV protease inhibitor. A method for enhancing the effectiveness of a second HIV protease inhibitor in treating HIV infection in a human patient whose HIV strain has become resistant to atazanavir or a pharmaceutically acceptable salt thereof, comprising administering to said human patient an amount of atazanavir or a pharmaceutically acceptable salt thereof effective in maintaining the resistant strain, in combination with the second HIV protease inhibitor. The resistance to atazanavir in the human is manifested by the existence of the signature mutation consisting of I50L mutation in the HIV protease.

    摘要翻译: 一种在人类患者中治疗HIV感染的方法,其中感染的HIV毒株已经变得对阿扎那韦具有抗性,所述方法包括施用治疗有效量的阿扎那韦或其药学上可接受的盐的组合以及至少一种其它HIV蛋白酶抑制剂 。 一种用于增强第二种HIV蛋白酶抑制剂治疗艾滋病毒感染的有效性的方法,其HIV病毒株已经变得对阿扎那韦或其药学上可接受的盐具有抗性,其包括向所述人类患者施用一定量的阿扎那韦或其药学上可接受的盐 其与第二种HIV蛋白酶抑制剂的组合有效地维持抗性菌株。 人类对阿扎那韦的耐药性表现在HIV蛋白酶中由I50L突变组成的特征突变的存在。

    METHOD FOR PREVENTING CIRCUIT FAILURES DUE TO GATE OXIDE LEAKAGE
    3.
    发明申请
    METHOD FOR PREVENTING CIRCUIT FAILURES DUE TO GATE OXIDE LEAKAGE 失效
    防止氧化物泄漏导致电路故障的方法

    公开(公告)号:US20050278662A1

    公开(公告)日:2005-12-15

    申请号:US10709798

    申请日:2004-05-28

    IPC分类号: G06F9/45 G06F17/50

    CPC分类号: G06F17/5036

    摘要: A method is disclosed for preventing circuit failures due to gate oxide leakage, and is used to efficiently check many nets of a circuit on a chip or within a macro to find logical fails due to gate oxide leakage using DC calculations, wherein the gate leakage is treated as a noise source for a static noise analysis of the circuit.

    摘要翻译: 公开了一种用于防止由于栅极氧化物泄漏引起的电路故障的方法,并且用于有效地检查芯片上或宏中的电路的许多网络,以便使用DC计算由于栅极氧化物泄漏而发现逻辑故障,其中栅极泄漏为 作为电路的静态噪声分析的噪声源。

    INTEGRATED CIRCUIT DESIGN FOR SIGNAL INTEGRITY, AVOIDING WELL PROXIMITY EFFECTS
    4.
    发明申请
    INTEGRATED CIRCUIT DESIGN FOR SIGNAL INTEGRITY, AVOIDING WELL PROXIMITY EFFECTS 失效
    集成电路设计信号完整性,避免良性接近效应

    公开(公告)号:US20050210431A1

    公开(公告)日:2005-09-22

    申请号:US10708715

    申请日:2004-03-19

    IPC分类号: G06F9/45 G06F17/50 H01L27/02

    摘要: A method, system and program product for designing an integrated circuit (IC) for signal integrity. The invention conducts a signal integrity analysis on an IC design; identifies any field effect transistor (FET) that causes a signal integrity failure in the case that the IC design fails the signal integrity analysis; and modifies an edge of a failing FET that is closer than a threshold distance to a well edge. The invention eliminates the manual, iterative procedure for determining the device causing a signal integrity failure due to well proximity effects.

    摘要翻译: 一种用于设计用于信号完整性的集成电路(IC)的方法,系统和程序产品。 本发明对IC设计进行信号完整性分析; 识别在IC设计失败信号完整性分析的情况下导致信号完整性故障的场效应晶体管(FET); 并且修改故障FET的边缘,该边缘比靠近阱边缘的阈值距离更近。 本发明消除了由于良好的邻近效应而导致信号完整性故障的装置的手动迭代过程。