Incremental adaptive packet routing in a multi-dimensional network
    1.
    发明授权
    Incremental adaptive packet routing in a multi-dimensional network 有权
    在多维网络中增量自适应分组路由

    公开(公告)号:US08537677B2

    公开(公告)日:2013-09-17

    申请号:US12577972

    申请日:2009-10-13

    IPC分类号: H04L12/56

    摘要: Illustrated is a computer system and method that includes a Processing Element (PE) to generate a data packet that is routed along a shortest path that includes a plurality of routers in a multiple dimension network. The system and method further include a router, of the plurality of routers, to de-route the data packet from the shortest path to an additional path, the de-route to occur where the shortest path is congested and the additional path links the router and an additional router in a dimension of the multiple dimension network.

    摘要翻译: 说明的是包括处理元件(PE)的计算机系统和方法,用于生成沿着包括多维网络中的多个路由器的最短路径路由的数据分组。 所述系统和方法还包括所述多个路由器中的路由器将所述数据分组从所述最短路径去路由到附加路径,所述去路由发生在所述最短路径拥塞的地方,并且所述附加路径链接所述路由器 以及多维网络维度中的附加路由器。

    Incremental Adaptive Packet Routing In A Multi-Dimensional Network
    2.
    发明申请
    Incremental Adaptive Packet Routing In A Multi-Dimensional Network 有权
    增量自适应分组路由在多维网络中

    公开(公告)号:US20110085561A1

    公开(公告)日:2011-04-14

    申请号:US12577972

    申请日:2009-10-13

    IPC分类号: H04L12/56

    摘要: Illustrated is a computer system and method that includes a Processing Element (PE) to generate a data packet that is routed along a shortest path that includes a plurality of routers in a multiple dimension network. The system and method further include a router, of the plurality of routers, to de-route the data packet from the shortest path to an additional path, the de-route to occur where the shortest path is congested and the additional path links the router and an additional router in a dimension of the multiple dimension network.

    摘要翻译: 说明的是包括处理元件(PE)的计算机系统和方法,用于生成沿着包括多维网络中的多个路由器的最短路径路由的数据分组。 所述系统和方法还包括所述多个路由器中的路由器将所述数据分组从所述最短路径去路由到附加路径,所述去路由发生在所述最短路径拥塞的地方,并且所述附加路径链接所述路由器 以及多维网络维度中的附加路由器。

    Three-dimensional die stacks with inter-device and intra-device optical interconnect
    3.
    发明授权
    Three-dimensional die stacks with inter-device and intra-device optical interconnect 有权
    具有器件间和器件内部光互连的三维管芯堆叠

    公开(公告)号:US08064739B2

    公开(公告)日:2011-11-22

    申请号:US11977350

    申请日:2007-10-23

    IPC分类号: G02B6/12 G11C5/06

    CPC分类号: G02B6/43 H01L2224/16225

    摘要: Examples of a computer system packaged in a three-dimensional stack of dies are described. The package includes an electrical die and an optical die coupled to and stacked with the electrical die. The electrical die includes circuitry to process and communicate electrical signals, and the optical die includes structures to transport optical signals. The electrical die has a smaller area than the optical die so that the optical die includes an exposed mezzanine which is configured with optical input/output ports. Additionally, the packaging can be configured to provide structural support against insertion forces for external optical connections.

    摘要翻译: 描述了封装在三维模组中的计算机系统的示例。 该封装包括电模头和耦合到电模具并与之堆叠的光学裸片。 电子管芯包括用于处理和传送电信号的电路,并且光学管芯包括传输光信号的结构。 电芯片具有比光学裸片更小的面积,使得光学管芯包括被配置有光学输入/输出端口的暴露的夹层。 此外,包装可以被配置成提供抵抗外部光学连接的插入力的结构支撑。

    Optical-based barrier synchronization methods and systems for implementing the same
    4.
    发明授权
    Optical-based barrier synchronization methods and systems for implementing the same 有权
    基于光的屏障同步方法和系统实现

    公开(公告)号:US07945128B1

    公开(公告)日:2011-05-17

    申请号:US12258674

    申请日:2008-10-27

    IPC分类号: G02B6/12 G02B6/28 G02B6/35

    摘要: Various embodiments of the present invention are directed to optical-based barrier methods and systems for synchronizing processing of two or more threads. In one method embodiment of a barrier method, each thread can be processed by a different processing element. The method comprises transmitting a lightwave along a waveguide that is optically coupled to each of the processing elements. Each processing element that processes a thread turns on diverter capable of diverting substantially all of the lightwave from the waveguide. Each processing element that completes processing of a thread turns off a corresponding diverter. A barrier is reached when all of the processing elements have turned off the corresponding diverters and discontinued diverting a portion of the lightwave from the waveguide.

    摘要翻译: 本发明的各种实施例涉及用于同步两个或更多个线程的处理的基于光学的屏障方法和系统。 在屏障方法的一个方法实施例中,每个线程可以被不同的处理元件处理。 该方法包括沿着光学耦合到每个处理元件的波导传输光波。 处理螺纹的每个处理元件都会启动能够将波导的基本上所有的光波转移的转向器。 完成线程处理的每个处理元件会关闭相应的分流器。 当所有处理元件已经关闭相应的分流器并且停止从波导转移光波的一部分时,达到屏障。

    Three-dimensional die stacks with inter-device and intra-device optical interconnect
    5.
    发明申请
    Three-dimensional die stacks with inter-device and intra-device optical interconnect 有权
    具有器件间和器件内部光互连的三维管芯堆叠

    公开(公告)号:US20090103855A1

    公开(公告)日:2009-04-23

    申请号:US11977350

    申请日:2007-10-23

    IPC分类号: G02B6/12 H01L31/18

    CPC分类号: G02B6/43 H01L2224/16225

    摘要: Examples of a computer system packaged in a three-dimensional stack of dies are described. The package includes an electrical die and an optical die coupled to and stacked with the electrical die. The electrical die includes circuitry to process and communicate electrical signals, and the optical die includes structures to transport optical signals. The electrical die has a smaller area than the optical die so that the optical die includes an exposed mezzanine which is configured with optical input/output ports. Additionally, the packaging can be configured to provide structural support against insertion forces for external optical connections.

    摘要翻译: 描述了封装在三维模组中的计算机系统的示例。 该封装包括电模头和耦合到电模具并与之堆叠的光学裸片。 电子管芯包括用于处理和传送电信号的电路,并且光学管芯包括传输光信号的结构。 电芯片具有比光学裸片更小的面积,使得光学管芯包括被配置有光学输入/输出端口的暴露的夹层。 此外,包装可以被配置成提供抵抗外部光学连接的插入力的结构支撑。