公开(公告)号：US09124451B2

公开(公告)日：2015-09-01

申请号：US13460683

申请日：2012-04-30

Applicant: Junya Tsuchida

Inventor： Junya Tsuchida

IPC: H04L27/00 ,  H04L7/00

CPC classification number: H04B1/7156 ,  H04B2001/71563 ,  H04B2201/713 ,  H04L7/0029 ,  H04L27/0014 ,  H04L27/2663 ,  H04L2027/003 ,  H04L2027/0046

Abstract: A radio receiving apparatus according to the present invention receives a preamble signal through one frequency band and also detects a periodic symbol timing in a receiving period of a part of a symbol that composes the preamble signal. A frequency correction circuit includes a generating unit, a detecting unit, and a correction unit. The generating unit generates a detection window of a predetermined time width including each of a first and a second symbol timing that are previously determined among the periodic symbol timings in the receiving period of a remaining symbol that composes the preamble signal. The detecting unit sequentially receives a correlation value between the preamble signal and a reference signal and detects a maximum value from the correlation value input during a period when the detection window is opened. The correction unit corrects a frequency deviation of the one frequency band based on the maximum value.

Abstract translation: 根据本发明的无线电接收装置通过一个频带接收前同步码信号，并且还检测构成前同步信号的符号的一部分的接收周期中的周期性符号定时。 频率校正电路包括发生单元，检测单元和校正单元。 生成单元生成预定时间宽度的检测窗口，该检测窗口包括在构成前置信号的剩余符号的接收周期中的周期性符号定时之间预先确定的第一和第二符号定时中的每一个。 检测单元顺序地接收前导码信号和参考信号之间的相关值，并且从检测窗口打开的期间输入的相关值检测最大值。 校正单元根据最大值校正一个频带的频率偏差。

公开(公告)号：US06529548B1

公开(公告)日：2003-03-04

申请号：US09534167

申请日：2000-03-24

Applicant: Yoshiyuki Aoki ,  Tomohiro Kitayama ,  Junya Tsuchida

Inventor： Yoshiyuki Aoki ,  Tomohiro Kitayama ,  Junya Tsuchida

IPC: H04B1700

CPC classification number: G06F13/4295 ,  H04L7/044 ,  H04L25/0262 ,  H04L69/323

Abstract: A baud rate detector detects baud rate of received serial data based on an AT command included in the serial data. A character discriminator detects parity type and data format of the serial data based on the AT command in the serial data. An information relay 16 sets the baud rate, the parity type and the data format to a register in a UART (Universal Asynchronous Receiver-Transmitter). A clock generator generates a clock signal for data reception and supplies the clock signal to the UART.

Abstract translation: 波特率检测器根据串行数据中包含的AT命令检测接收到的串行数据的波特率。 字符鉴别器根据串行数据中的AT命令检测串行数据的奇偶校验类型和数据格式。 信息中继器16将波特率，奇偶校验类型和数据格式设置为UART（通用异步收发器）中的寄存器。 时钟发生器产生用于数据接收的时钟信号，并将时钟信号提供给UART。

公开(公告)号：US07778363B2

公开(公告)日：2010-08-17

申请号：US11709788

申请日：2007-02-23

Applicant: Osamu Inagawa ,  Junya Tsuchida

Inventor： Osamu Inagawa ,  Junya Tsuchida

IPC: H03D1/00 ,  H01L27/06

CPC classification number: H04L27/2662 ,  H04L7/0058 ,  H04L7/042 ,  H04L27/2675

Abstract: A synchronization timing detecting apparatus includes a correlation calculator configured to generate a first correlation value by calculating a cross-correlation between an input signal being sampled and a reference signal or an auto-correlation of the sampled input signal, an interpolation processor configured to generate a second correlation value interpolating a plurality of the first correlation values having a different combination of sampling points of the input signal, and a detector to detect a synchronization timing based on the first and the second correlation values.

Abstract translation: 同步定时检测装置包括：相关计算器，被配置为通过计算被采样的输入信号与参考信号之间的互相关或产生采样的输入信号的自相关来产生第一相关值;内插处理器， 内插具有输入信号的采样点的不同组合的多个第一相关值的第二相关值和基于第一和第二相关值检测同步定时的检测器。

公开(公告)号：US20080043886A1

公开(公告)日：2008-02-21

申请号：US11889911

申请日：2007-08-17

Applicant: Osamu Inagawa ,  Junya Tsuchida

Inventor： Osamu Inagawa ,  Junya Tsuchida

IPC: H04L27/06

CPC classification number: H04L27/2662 ,  H04B1/7183 ,  H04L5/0007 ,  H04L5/0048 ,  H04L27/2675

Abstract: A complex correlation unit of a detection execution unit calculates a correlation between a received signal and a fixed preamble pattern and sequentially obtains a correlation result. A correlation peak detection section updates a maximum value of a correlation result R as a correlation peak value and holds it. An error detection threshold generation section multiplies the correlation peak value detected by the correlation peak detection unit by a coefficient α (0

Abstract translation: 检测执行单元的复相关单元计算接收信号和固定前导码模式之间的相关性，并且顺序地获得相关结果。 相关峰值检测部分将相关结果R的最大值更新为相关峰值并保持相关峰值。 误差检测阈值生成部分将由相关峰值检测单元检测的相关峰值乘以系数α（0 <α<1）以获得错误检测阈值。 在相关峰值检测部检测和保持的相关峰值在具有预定长度的符号定时确定期间未被更新的条件下，错误检测确定部分和控制部分将相关峰值的定时确定为符号定时 并且在符号定时确定时段内定义的错误检测确定时段中相关结果的出现次数超过错误检测确定阈值的数量小于预定数量。

公开(公告)号：US07822152B2

公开(公告)日：2010-10-26

申请号：US11889911

申请日：2007-08-17

Applicant: Osamu Inagawa ,  Junya Tsuchida

Inventor： Osamu Inagawa ,  Junya Tsuchida

IPC: H04L27/06

CPC classification number: H04L27/2662 ,  H04B1/7183 ,  H04L5/0007 ,  H04L5/0048 ,  H04L27/2675

Abstract: A symbol timing detection method, executed in a processor, is provided where, upon detecting a symbol timing from a received signal composed of a packet having a preamble with periodically allocated symbols placed at a head of data, correlation results indicating a correlation between the received signal and a fixed pattern of the preamble are obtained, a maximum value in the correlation results are updated and held, and a timing of the maximum value is determined as a symbol timing on a condition that a maximum value currently held by the correlation peak detection unit is not updated in a symbol timing determination period having a predetermined length from the timing and that a number of occurrences of a correlation result exceeding an error detection determination threshold is smaller than a predetermined number in an error detection determination period defined within the symbol timing determination period.

Abstract translation: 提供了一种在处理器中执行的符号定时检测方法，其中在从由具有位于数据头的周期性分配符号的具有前导码的分组组成的接收信号检测到符号定时时，相关结果指示接收到的相关性 信号和前导码的固定模式，相关结果中的最大值被更新和保持，并且在通过相关峰值检测当前保持的最大值的条件下将最大值的定时确定为符号定时 在从该定时开始的预定长度的符号定时确定周期中不更新单元，并且在符号定时中定义的错误检测确定周期中，超过错误检测确定阈值的相关结果的出现次数小于预定数量 决定时期。

公开(公告)号：US20070211835A1

公开(公告)日：2007-09-13

申请号：US11709788

申请日：2007-02-23

Applicant: Osamu Inagawa ,  Junya Tsuchida

Inventor： Osamu Inagawa ,  Junya Tsuchida

IPC: H04L27/06 ,  H04L7/00

CPC classification number: H04L27/2662 ,  H04L7/0058 ,  H04L7/042 ,  H04L27/2675

Abstract: A synchronization timing detecting apparatus includes a correlation calculator configured to generate a first correlation value by calculating a cross-correlation between an input signal being sampled and a reference signal or an auto-correlation of the sampled input signal, an interpolation processor configured to generate a second correlation value interpolating a plurality of the first correlation values having a different combination of sampling points of the input signal, and a detector to detect a synchronization timing based on the first and the second correlation values.

Abstract translation: 同步定时检测装置包括：相关计算器，被配置为通过计算被采样的输入信号与参考信号之间的互相关或产生采样的输入信号的自相关来产生第一相关值;内插处理器， 内插具有输入信号的采样点的不同组合的多个第一相关值的第二相关值和基于第一和第二相关值检测同步定时的检测器。