公开(公告)号：US20210050048A1

公开(公告)日：2021-02-18

申请号：US16799196

申请日：2020-02-24

Applicant: KIOXIA CORPORATION

Inventor： Rui ITO ,  Takeshi HIOKA ,  Takuyo KODAMA

IPC: G11C11/4091 ,  G11C11/4074 ,  G11C11/4094 ,  G11C11/56

Abstract: According to one embodiment, a sense amplifier circuit includes an amplifier having an input terminal connected to a sense node, and a first capacitor configured to be connected in a feedback path of the amplification transistor and to a bit line of a memory cell via the sense node, the first capacitor configured to supply a current to the memory cell and integrate the current when the memory cell is read.

公开(公告)号：US20210264989A1

公开(公告)日：2021-08-26

申请号：US17008337

申请日：2020-08-31

Applicant: KIOXIA CORPORATION

Inventor： Kosuke YANAGIDAIRA ,  Takuyo KODAMA ,  Takeshi HIOKA

IPC: G11C16/26 ,  G11C16/04 ,  G11C16/08

Abstract: A semiconductor storage device includes first and second memory cells, first and second word lines connected to the first and second memory cells, respectively, a bit line connected to the first and second memory cells, and a sense amplifier including a sense node. During a first read, a controller applies a first read voltage to the second word line and determines a read result. During a second read, the controller discharges the sense node for a first time period while applying a second read voltage to the first word line to determine a first read result, and discharges the sense node for a second time period while applying the second read voltage to determine a second read result. The controller determines read data based on the first read result, the second read result, and the read result of the second memory cell.