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公开(公告)号:US20190302734A1
公开(公告)日:2019-10-03
申请号:US16254951
申请日:2019-01-23
Applicant: KLA-Tencor Corporation
Inventor: Shivam Agarwal , Hariharasudhan Koteeswaran , Priyank Jain , Suvi Murugan , Yuan Zhong
IPC: G05B19/4097 , G05B13/02
Abstract: A system includes a controller with processors configured to execute an auto-correlation module embodied in one or more sets of program instructions stored in memory. The auto-correlation module is configured to cause the processors to receive one or more patterned wafer geometry metrics, receive wafer characterization data from one or more characterization tools, determine a correlation between the one or more patterned wafer geometry metrics and the wafer characterization data, generate a ranking of the one or more patterned wafer geometry metrics based on the determined correlation, construct a composite metric model from a subset of the one or more patterned wafer geometry metrics based on the ranking of the one or more patterned wafer geometry metrics, generate one or more composite wafer metrics from the composite metric model, and generate a statistical process control output based on the one or more composite wafer metrics.
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公开(公告)号:US11454949B2
公开(公告)日:2022-09-27
申请号:US16254951
申请日:2019-01-23
Applicant: KLA-Tencor Corporation
Inventor: Shivam Agarwal , Hariharasudhan Koteeswaran , Priyank Jain , Suvi Murugan , Yuan Zhong
IPC: G05B19/4097 , G05B13/02
Abstract: A system includes a controller with processors configured to execute an auto-correlation module embodied in one or more sets of program instructions stored in memory. The auto-correlation module is configured to cause the processors to receive one or more patterned wafer geometry metrics, receive wafer characterization data from one or more characterization tools, determine a correlation between the one or more patterned wafer geometry metrics and the wafer characterization data, generate a ranking of the one or more patterned wafer geometry metrics based on the determined correlation, construct a composite metric model from a subset of the one or more patterned wafer geometry metrics based on the ranking of the one or more patterned wafer geometry metrics, generate one or more composite wafer metrics from the composite metric model, and generate a statistical process control output based on the one or more composite wafer metrics.
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公开(公告)号:US20180315670A1
公开(公告)日:2018-11-01
申请号:US15814884
申请日:2017-11-16
Applicant: KLA-Tencor Corporation
Inventor: Arpit Yati , Shivam Agarwal , Jagdish Saraswatula , Andrew Cross
Abstract: A wafer topography measurement system can be paired with a scanning electron microscope. A topography threshold can be applied to wafer topography data about the wafer, which was obtained with the wafer topography measurement system. A metrology sampling plan can be generated for the wafer. This metrology sampling plan can include locations in the wafer topography data above the topography threshold. The scanning electron microscope can scan the wafer using the metrology sampling plan and identify defects.
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公开(公告)号:US10957608B2
公开(公告)日:2021-03-23
申请号:US15814884
申请日:2017-11-16
Applicant: KLA-Tencor Corporation
Inventor: Arpit Yati , Shivam Agarwal , Jagdish Saraswatula , Andrew Cross
Abstract: A wafer topography measurement system can be paired with a scanning electron microscope. A topography threshold can be applied to wafer topography data about the wafer, which was obtained with the wafer topography measurement system. A metrology sampling plan can be generated for the wafer. This metrology sampling plan can include locations in the wafer topography data above the topography threshold. The scanning electron microscope can scan the wafer using the metrology sampling plan and identify defects.
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