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公开(公告)号：US20190067060A1
公开(公告)日：2019-02-28
申请号：US16113930
申请日：2018-08-27
Applicant: KLA-Tencor Corporation
Inventor： Martin Plihal , Brian Duffy , Mike VonDenHoff , Andrew Cross , Kaushik Sah , Antonio Mani
Abstract: Methods and systems fir identifying nuisances and defects of interest (DOIs) in defects detected on a wafer are provided. One method includes acquiring metrology data for the wafer generated by a metrology tool that performs measurements on the wafer at an array of measurement points. In one embodiment, the measurement points are determined prior to detecting the defects on the wafer and independently of the defects detected on the wafer. The method also includes determining locations of defects detected on the wafer with respect to locations of the measurement points on the wafer and assigning metrology data to the defects as a defect attribute based on the locations of the defects determined with respect to the locations of the measurement points. In addition, the method includes determining if the defects are nuisances or DOIs based on the defect attributes assigned to the defects.
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公开(公告)号：US20180315670A1
公开(公告)日：2018-11-01
申请号：US15814884
申请日：2017-11-16
Applicant: KLA-Tencor Corporation
Inventor： Arpit Yati , Shivam Agarwal , Jagdish Saraswatula , Andrew Cross
Abstract: A wafer topography measurement system can be paired with a scanning electron microscope. A topography threshold can be applied to wafer topography data about the wafer, which was obtained with the wafer topography measurement system. A metrology sampling plan can be generated for the wafer. This metrology sampling plan can include locations in the wafer topography data above the topography threshold. The scanning electron microscope can scan the wafer using the metrology sampling plan and identify defects.
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公开(公告)号：US20180174797A1
公开(公告)日：2018-06-21
申请号：US15729458
申请日：2017-10-10
Applicant: KLA-Tencor Corporation
Inventor： Andrew Cross , Allen Park
CPC classification number: H01J37/268 , G03F7/7065 , G06T7/001 , H01J2237/2817 , H01L22/12 , H01L22/20
Abstract: A weak pattern identification method includes acquiring inspection data from a set of patterns on a wafer, identifying failing pattern types on the wafer, and grouping like pattern types of the failing pattern types into a set of pattern groups. The weak pattern identification method also includes acquiring image data from multiple varied instances of a first pattern type grouped in a first group, wherein the multiple varied instances of the first pattern type are formed under different conditions. The weak pattern identification method also includes comparing images obtained from common structures of the instances of the first pattern type to identify local differences within a portion of the first pattern type. Further, the weak pattern identification method includes identifying metrology sites within the portion of the first pattern type proximate to a location of the local differences within the portion of the first pattern type.
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Patent Agency Ranking
公开(公告)号：US10262831B2
公开(公告)日：2019-04-16
申请号：US15729458
申请日：2017-10-10
Applicant: KLA-Tencor Corporation
Inventor： Andrew Cross , Allen Park
Abstract: A weak pattern identification method includes acquiring inspection data from a set of patterns on a wafer, identifying failing pattern types on the wafer, and grouping like pattern types of the failing pattern types into a set of pattern groups. The weak pattern identification method also includes acquiring image data from multiple varied instances of a first pattern type grouped in a first group, wherein the multiple varied instances of the first pattern type are formed under different conditions. The weak pattern identification method also includes comparing images obtained from common structures of the instances of the first pattern type to identify local differences within a portion of the first pattern type. Further, the weak pattern identification method includes identifying metrology sites within the portion of the first pattern type proximate to a location of the local differences within the portion of the first pattern type.
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公开(公告)号：US10957608B2
公开(公告)日：2021-03-23
申请号：US15814884
申请日：2017-11-16
Applicant: KLA-Tencor Corporation
Inventor： Arpit Yati , Shivam Agarwal , Jagdish Saraswatula , Andrew Cross
Abstract: A wafer topography measurement system can be paired with a scanning electron microscope. A topography threshold can be applied to wafer topography data about the wafer, which was obtained with the wafer topography measurement system. A metrology sampling plan can be generated for the wafer. This metrology sampling plan can include locations in the wafer topography data above the topography threshold. The scanning electron microscope can scan the wafer using the metrology sampling plan and identify defects.
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公开(公告)号：US10818001B2
公开(公告)日：2020-10-27
申请号：US16241467
申请日：2019-01-07
Applicant: KLA-TENCOR CORPORATION
Inventor： Wing-Shan Ribi Leung , Kaushik Sah , Allen Park , Andrew Cross
Abstract: A stochastic calculation engine receives inputs from a semiconductor inspection tool or semiconductor review tool. The stochastic calculation engine determines abnormal locations and pattern variation from the inputs and determines stochastic failures from the inputs. An electronic data storage unit connected with the stochastic calculation engine can include a database with known stochastic behavior and known process metrology variations. The stochastic calculation engine can flag stochastic features, determine a failure rate, or determine fail probability.
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公开(公告)号：US10699926B2
公开(公告)日：2020-06-30
申请号：US16113930
申请日：2018-08-27
Applicant: KLA-Tencor Corporation
Inventor： Martin Plihal , Brian Duffy , Mike VonDenHoff , Andrew Cross , Kaushik Sah , Antonio Mani
Abstract: Methods and systems fir identifying nuisances and defects of interest (DOIs) in defects detected on a wafer are provided. One method includes acquiring metrology data for the wafer generated by a metrology tool that performs measurements on the wafer at an array of measurement points. In one embodiment, the measurement points are determined prior to detecting the defects on the wafer and independently of the defects detected on the wafer. The method also includes determining locations of defects detected on the wafer with respect to locations of the measurement points on the wafer and assigning metrology data to the defects as a defect attribute based on the locations of the defects determined with respect to the locations of the measurement points. In addition, the method includes determining if the defects are nuisances or DOIs based on the defect attributes assigned to the defects.
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公开(公告)号：US20200082523A1
公开(公告)日：2020-03-12
申请号：US16241467
申请日：2019-01-07
Applicant: KLA-TENCOR CORPORATION
Inventor： Wing-Shan Ribi Leung , Kaushik Sah , Allen Park , Andrew Cross
Abstract: A stochastic calculation engine receives inputs from a semiconductor inspection tool or semiconductor review tool. The stochastic calculation engine determines abnormal locations and pattern variation from the inputs and determines stochastic failures from the inputs. An electronic data storage unit connected with the stochastic calculation engine can include a database with known stochastic behavior and known process metrology variations. The stochastic calculation engine can flag stochastic features, determine a failure rate, or determine fail probability.
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