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1.发明申请公开(公告)号：US20220068379A1
公开(公告)日：2022-03-03
申请号：US17405174
申请日：2021-08-18
Inventor： Donguk KIM , Jun Tae JANG , Dae Hwan KIM , Dong Myoung KIM , Sung Jin CHOI
Abstract: The present invention relates to a synapse and synaptic array, and a computing system using the same. The synaptic device according to an exemplary embodiment of the present invention includes a transistor in which a synaptic input signal is applied to any one electrode of source and drain electrodes; and a plurality of two-terminal variable resistance memory devices in which a first electrode is electrically globally connected to a gate electrode of the transistor, wherein a separate memory voltage is applied to a second electrode of each variable resistance memory device to adjust a gate voltage applied to the gate electrode, thereby controlling a synaptic output signal which is output to the other one of the source and drain electrodes.
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公开(公告)号：US20250056845A1
公开(公告)日：2025-02-13
申请号：US18928394
申请日：2024-10-28
Inventor： Dae Hwan KIM , Dong Yeon KANG , Jun Tae JANG , Shin Young PARK , Hyun Kyu LEE , Sung Jin CHOI , Dong Myoung KIM , Wonjung KIM
IPC: H01L29/78 , G06N3/063 , H01L21/02 , H01L29/66 , H01L29/786 , H01L29/788
Abstract: Disclosed is a synaptic transistor, including a substrate, an expansion gate electrode disposed to extend in one direction on the substrate, a gate insulating layer including ions, covering the expansion gate electrode, and disposed on the substrate, a channel layer disposed on the gate insulating layer to correspond to one end of the expansion gate electrode, source and drain electrodes spaced apart from each other, covering both ends of the channel layer, and disposed on the gate insulating layer, and a pad electrode disposed on the gate insulating layer to correspond to the other end of the expansion gate electrode.
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公开(公告)号：US20220077314A1
公开(公告)日：2022-03-10
申请号：US17462554
申请日：2021-08-31
Inventor： Dae Hwan KIM , Dong Yeon KANG , Jun Tae JANG , Shin Young PARK , Hyun Kyu LEE , Sung Jin CHOI , Dong Myoung KIM
IPC: H01L29/78 , H01L29/786 , H01L29/788 , H01L21/02 , H01L29/66 , G06N3/063
Abstract: Disclosed is a synaptic transistor, including a substrate, an expansion gate electrode disposed to extend in one direction on the substrate, a gate insulating layer including ions, covering the expansion gate electrode, and disposed on the substrate, a channel layer disposed on the gate insulating layer to correspond to one end of the expansion gate electrode, source and drain electrodes spaced apart from each other, covering both ends of the channel layer, and disposed on the gate insulating layer, and a pad electrode disposed on the gate insulating layer to correspond to the other end of the expansion gate electrode.
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公开(公告)号：US20240379156A1
公开(公告)日：2024-11-14
申请号：US18564258
申请日：2022-04-07
Inventor： Dae Hwan KIM , Dong Myoung KIM , Sung Jin CHOI , Chang Wook KIM , Jin Gyu PARK , Dong Uk KIM , Hyun Kyu LEE , Tae Jun YANG
Abstract: The present invention relates to an optical property storage device and a system using the same. The device according to an exemplary embodiment of the present invention comprises: a light transistor in which the conductance between a source electrode and a drain electrode changes in accordance with optical properties of color temperature and illumination of incident light; and a variable resistance memory device of a second terminal in which a first electrode is electrically connected to any one electrode from among the source and drain electrodes of the light transistor, and which stores a conductance changing in accordance with the changed conductance of the light transistor.
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