公开(公告)号：US09831245B1

公开(公告)日：2017-11-28

申请号：US15416859

申请日：2017-01-26

申请人： KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

发明人： Hyung-Jun Kim ,  Hyun Cheol Koo ,  Chaun Jang ,  Hansung Kim

IPC分类号： H01L21/28 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/778 ,  H01L29/36

CPC分类号： H01L27/092 ,  H01L21/28291 ,  H01L21/823807 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/085 ,  H01L29/0895 ,  H01L29/36 ,  H01L29/66462 ,  H01L29/66984 ,  H01L29/7785 ,  H01L29/7786

摘要： A complementary logic device includes i) a substrate, ii) a first semiconductor device located on the substrate and including a first channel layer, a carrier supply layer for supplying a carrier to the channel layer, and an upper cladding layer and a lower cladding layer respectively located at upper and lower portions of the channel layer, iii) a second semiconductor device located on the substrate and including a structure the same or similar to that of the first semiconductor device, iv) a source electrode located on the two semiconductors and made of a ferromagnetic body, v) a drain electrode located on the two semiconductors and made of a ferromagnetic body, and vi) a gate electrode located on the two semiconductors and located between the two electrodes so that a gate voltage is applied thereto to control a spin of electrons passing through the two channel layers.

公开(公告)号：US10886161B2

公开(公告)日：2021-01-05

申请号：US16282299

申请日：2019-02-22

申请人： KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

发明人： Hyung-jun Kim ,  Sanghyeon Kim ,  Hansung Kim ,  Seong Kwang Kim ,  Hyeong Rak Lim

IPC分类号： H01L21/762 ,  H01L21/683 ,  H01L29/06 ,  H01L21/02 ,  H01L21/78

摘要： A method for manufacturing a semiconductor device according to embodiments may include forming a sacrificial layer on a first substrate including first dopant atoms and second dopant atoms, and forming a germanium (Ge) layer on the sacrificial layer. Here, the germanium (Ge) layer may include the first dopant atoms diffused from the first substrate by growth temperature in the forming step. Additionally, the method for manufacturing a semiconductor device may further include annealing after growth of the germanium (Ge) layer so that the germanium (Ge) layer may include second dopant atoms.