公开(公告)号：US20230253019A1

公开(公告)日：2023-08-10

申请号：US18101287

申请日：2023-01-25

Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

Inventor： Jongsun PARK ,  Sung Soo CHEON ,  Kyeong Ho LEE

IPC: G11C7/10 ,  G11C7/16 ,  G11C5/06

CPC classification number: G11C7/109 ,  G11C5/063 ,  G11C7/16

Abstract: Disclosed is a memory device, which includes a memory cell array connected to a first word line, a pair of second word lines, and a bit line, and that performs a multiply-accumulate (MAC) operation depending on a ternary input provided from the pair of second word lines and a binary weight preset based on the first word line and the bit line; a peripheral circuit that controls the memory cell array; and an ADC (analog-to-digital converter) circuit that converts a voltage value dependent on the MAC operation into a digital value.