公开(公告)号：US20250079321A1

公开(公告)日：2025-03-06

申请号：US18805598

申请日：2024-08-15

Applicant: KYOCERA AVX Components Corporation

Inventor： Jonathan Herr ,  Cory Nelson ,  Marianne Berolini ,  Joseph Hock

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/48 ,  H01L25/00 ,  H01L25/065

Abstract: Vertically oriented interposer stacks, assemblies, and methods are provided. For example, a vertically oriented interposer stack includes a plurality of interposers and a plurality of components. Each component is disposed between adjacent interposers. Each interposer includes a first side surface opposite a second side surface along the vertical direction. The first side surface and the second side surface each extend along the longitudinal direction from a first end surface to a second end surface. Each interposer has a first external termination formed on the first side surface and a second external termination formed on the first side surface. The first and second external terminations are spaced apart along the longitudinal direction. The interposers are stacked along the lateral direction such that the first external terminations are generally aligned with one another along the lateral direction and the second external terminations are generally aligned with one another along the lateral direction.

公开(公告)号：US20220312593A1

公开(公告)日：2022-09-29

申请号：US17702927

申请日：2022-03-24

Applicant: KYOCERA AVX Components Corporation

Inventor： Cory Nelson ,  Gheorghe Korony ,  Jonathan Herr ,  Marianne Berolini

IPC: H05K1/18 ,  H03H1/02 ,  H01C1/012

Abstract: A surface mount component can include a monolithic substrate, an input terminal, an output terminal, and a DC bias terminal. Each terminal can be formed over the monolithic substrate. A conductive trace can be formed over a surface of the monolithic substrate included in a signal path between the input terminal and the output terminal. A thin-film resistor can be connected in a DC bias path between the DC bias terminal and the signal path. The DC bias path can have, at one or more locations along the DC bias path between the DC bias terminal and the signal path, a cross-sectional area in a plane that is perpendicular to the surface of the monolithic substrate. The cross-sectional area of the DC bias path can be less than about 1,000 square microns.

公开(公告)号：US20250079419A1

公开(公告)日：2025-03-06

申请号：US18805603

申请日：2024-08-15

Applicant: KYOCERA AVX Components Corporation

Inventor： Jonathan Herr ,  Cory Nelson ,  Marianne Berolini ,  Joseph Hock

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/48 ,  H01L23/538 ,  H01L25/00

Abstract: Vertically oriented component stacks, assemblies, and methods are provided. For example, a vertically oriented component stack includes a plurality of components that each include a first side surface opposite a second side surface along a vertical direction. The first and second side surfaces each extend along a longitudinal direction from a first end surface to a second end surface. Each component has a first external termination and a second external termination formed on the first side surface. The first external termination is spaced apart from the second external termination along the longitudinal direction. The plurality of components are stacked along the lateral direction such that the first external terminations of the plurality of components are generally aligned with one another along the lateral direction and the second external terminations of the plurality of components are generally aligned with one another along the lateral direction.

公开(公告)号：US20250167414A1

公开(公告)日：2025-05-22

申请号：US18944054

申请日：2024-11-12

Applicant: KYOCERA AVX Components Corporation

Inventor： Cory Nelson ,  Marianne Berolini ,  Jonathan Herr

IPC: H01P1/20 ,  H01P11/00 ,  H05K1/02 ,  H05K1/11

Abstract: Filters, filter assemblies, and methods of forming filters are provided. For example, a filter includes a plurality of dielectric layers that are stacked in a Z-direction to form a substrate having a top, a bottom, and a perimeter, with an outer dielectric layer disposed at the top. The filter also includes a plurality of conductive layers, with an outer conductive layer formed over the outer dielectric layer, and a plurality of vias that are defined along the perimeter of the substrate and extend from the outer conductive layer to the bottom of the substrate. An assembly includes the filter attached to a device substrate. A method of forming the filter includes forming the dielectric and conductive layers, such as by forming an outer conductive layer over an outer dielectric layer; stacking the plurality of layers to form a substrate; and defining a plurality of vias along the substrate's perimeter.

公开(公告)号：US20250167750A1

公开(公告)日：2025-05-22

申请号：US18944067

申请日：2024-11-12

Applicant: KYOCERA AVX Components Corporation

Inventor： Cory Nelson ,  Marianne Berolini ,  Jonathan Herr

IPC: H03H7/01 ,  H03H3/00

Abstract: Filters, filter assemblies, and methods of forming filters are provided. For example, a filter includes a plurality of dielectric layers stacked in a Z-direction to form a substrate having a top and a bottom, and at least one conductive layer is formed over a dielectric layer. The conductive layer is positioned at a location along the Z-direction between the top and bottom of the substrate that is about 200 μm or less from the bottom of the substrate. An assembly includes the filter attached to a device substrate. A method of forming the filter includes forming the dielectric layers and the at least one conductive layer, such as by forming the conductive layer over a dielectric layer, and stacking the plurality of layers to form a substrate with the conductive layer disposed about 200 μm or less from a bottom of the substrate.

公开(公告)号：US20250079404A1

公开(公告)日：2025-03-06

申请号：US18805594

申请日：2024-08-15

Applicant: KYOCERA AVX Components Corporation

Inventor： Jonathan Herr ,  Cory Nelson ,  Marianne Berolini ,  Joseph Hock

IPC: H01L25/065 ,  H01L23/48 ,  H01L23/538 ,  H01L25/00

Abstract: A vertical component stack, assembly, and method are provided. For example, a vertical component stack may include a plurality of components that each include an upper surface and a lower surface opposite the upper surface along a vertical direction. The plurality of components are stacked along the vertical direction such that a lower surface of a second component of the plurality of components is disposed over an upper surface of a first component of the plurality of components. An input and an output of each component of the plurality of components is exposed on a lower surface of the first component of the plurality of components.