Multilayer Filter, Multilayer Filter Assembly, and Methods for Forming a Multilayer Filter

    公开(公告)号:US20250167414A1

    公开(公告)日:2025-05-22

    申请号:US18944054

    申请日:2024-11-12

    Abstract: Filters, filter assemblies, and methods of forming filters are provided. For example, a filter includes a plurality of dielectric layers that are stacked in a Z-direction to form a substrate having a top, a bottom, and a perimeter, with an outer dielectric layer disposed at the top. The filter also includes a plurality of conductive layers, with an outer conductive layer formed over the outer dielectric layer, and a plurality of vias that are defined along the perimeter of the substrate and extend from the outer conductive layer to the bottom of the substrate. An assembly includes the filter attached to a device substrate. A method of forming the filter includes forming the dielectric and conductive layers, such as by forming an outer conductive layer over an outer dielectric layer; stacking the plurality of layers to form a substrate; and defining a plurality of vias along the substrate's perimeter.

    Multilayer ceramic capacitor having ultra-broadband performance

    公开(公告)号:US11984262B2

    公开(公告)日:2024-05-14

    申请号:US17680746

    申请日:2022-02-25

    CPC classification number: H01G4/012 H01G4/30

    Abstract: A multilayer ceramic capacitor may include a monolithic body including a plurality of dielectric layers and a plurality of electrode regions. The plurality of electrode regions can include a dielectric region, an active electrode region, and a shield electrode region. The active electrode region may be located between the dielectric region and the shield electrode region in a Z-direction. The dielectric region may extend from the active electrode region to the top surface of the broadband multilayer ceramic capacitor. The capacitor may include a plurality of active electrodes arranged within the active electrode region and at least one shield electrode arranged within the shield electrode region. The dielectric region may be free of electrode layers that extend greater than 25% of a length of the capacitor. A ratio of a capacitor thickness to a thickness of the dielectric region may be less than about 20.

    Multilayer Capacitor
    4.
    发明公开

    公开(公告)号:US20240145169A1

    公开(公告)日:2024-05-02

    申请号:US18494797

    申请日:2023-10-26

    CPC classification number: H01G4/012 H01G4/2325 H01G4/30 H05K1/181

    Abstract: The present invention is directed to a multilayer capacitor, a circuit board containing the multilayer capacitor, and an integrated circuit package containing the multilayer capacitor. A multilayer capacitor includes a body containing alternating dielectric layers and internal electrode layers that each include a first electrode and a second, co-planar electrode, the first electrode having a main body with at least one lead tab extending from each of a top edge and a bottom edge thereof. The capacitor also includes a first external terminal and a second external terminal that each wrap from a top surface, along an end surface, to a bottom surface. The first external terminal is electrically connected to the first electrode of the first internal electrode layers along its lead tab leading edges, and the second external terminal is electrically connected to the first electrode of the second internal electrode layers along its lead tab leading edges.

    Low Inductance Component
    5.
    发明公开

    公开(公告)号:US20230238186A1

    公开(公告)日:2023-07-27

    申请号:US18194675

    申请日:2023-04-03

    CPC classification number: H01G4/38 H01L27/0805 H01G4/12 H01G4/40 H01L28/60

    Abstract: A low inductance component may include a multilayer, monolithic device including a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The lead(s) may be coupled with the first active termination, second active termination, and/or the at least one ground termination. The lead(s) may have respective length(s) and maximum width(s). A ratio of the length(s) to the respective maximum width(s) of the lead(s) may be less than about 20.

    Electronically Insulating Thermal Connector having a Low Thermal Resistivity

    公开(公告)号:US20230076503A1

    公开(公告)日:2023-03-09

    申请号:US17891193

    申请日:2022-08-19

    Abstract: A heat sink component can include a body including a thermally conductive material that is electrically non-conductive. At least one first terminal can be formed over a first end of the body. At least one second terminal formed over a second end of the body. The second end of the body can be opposite the first end of the body in an X-direction. The heat sink component can have a length in the X-direction and a width in a Y-direction that is parallel with the top surface and perpendicular to the X-direction. A ratio of the width to the length can be greater than about 1.

    Varistor Array Including Matched Varistors

    公开(公告)号:US20220293306A1

    公开(公告)日:2022-09-15

    申请号:US17692284

    申请日:2022-03-11

    Abstract: A varistor array can include a monolithic body including a plurality of dielectric layers. A first varistor can be formed in the monolithic body. The first varistor can include a first external terminal on a first end of the monolithic body, a first plurality of electrodes connected with the first external terminal, a second external terminal on a second end of the monolithic body, and a second plurality of electrodes connected with the second external terminal. The second plurality of electrodes can be interleaved with the first plurality of electrodes and can overlap the first plurality of electrodes at an overlapping area that is insensitive to a relative misalignment between the first plurality of electrodes and the second plurality of electrodes when the misalignment is less than a threshold. A second varistor can be formed in the monolithic body that is distinct from the first varistor.

    Multilayer Ceramic Capacitor Having Ultra-Broadband Performance

    公开(公告)号:US20220093332A1

    公开(公告)日:2022-03-24

    申请号:US17541337

    申请日:2021-12-03

    Abstract: A broadband multilayer ceramic capacitor may include a monolithic body including a plurality of dielectric layers stacked in the Z-direction, a first external terminal, and a second external terminal. A plurality of active electrodes, a bottom shield electrode, and a top shield electrode may be arranged within the monolithic body. The top shield electrode may be positioned between the active electrodes and a top surface of the capacitor and spaced apart from the top surface of the capacitor by a top-shield-to-top distance. A bottom shield electrode may be positioned between the active electrodes and the bottom surface of the capacitor and spaced apart from the bottom surface of the capacitor by a bottom-shield-to-bottom distance. A ratio of the top-shield-to-top distance to the bottom-shield-to-bottom distance may be between about 0.8 and about 1.2. The bottom-shield-to-bottom distance may range from about 8 microns to about 100 microns.

    Multilayer Capacitor
    9.
    发明公开

    公开(公告)号:US20240145176A1

    公开(公告)日:2024-05-02

    申请号:US18494801

    申请日:2023-10-26

    Abstract: The present invention is directed to a multilayer capacitor, a circuit board containing the multilayer capacitor, and an integrated circuit package containing the multilayer capacitor. A multilayer capacitor a body containing alternating dielectric layers and electrode layers. Each electrode layer includes a first electrode having a base, connecting, and central sections; a first connecting edge extending from a first leading edge of the base section to a first edge of the central section; and a second connecting edge extending from a second leading edge of the base section to a second edge of the central section. At least a portion of at least one of the first connecting edge or the second connecting edge of the first electrode of the electrode layers is not perpendicular to the respective first edge or second edge of the central section of the first electrode.

    Multilayer Ceramic Capacitor Having Ultra-Broadband Performance

    公开(公告)号:US20240029956A1

    公开(公告)日:2024-01-25

    申请号:US18481273

    申请日:2023-10-05

    CPC classification number: H01G4/012

    Abstract: A broadband multilayer ceramic capacitor can include at least one active electrode layer including a first active electrode and a second active electrode. The first active electrode can have a central portion extending away from a base portion in a longitudinal direction. The second active electrode can include at least one arm extending away from a base portion towards the first end and overlapping the central portion of the first active electrode. A first shield electrode in a shield electrode region can have a central portion extending from a base portion. A second shield electrode can include an arm overlapping the central portion of the first shield electrode in the longitudinal direction. The shield electrode region can be spaced apart from the active electrode region by a shield-to-active distance that is greater than an active electrode spacing distance between respective active electrodes of the plurality of active electrodes.

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