公开(公告)号：US20240107661A1

公开(公告)日：2024-03-28

申请号：US18472051

申请日：2023-09-21

Applicant: KYOCERA Document Solutions Inc.

Inventor： Shotaro Ikegami

IPC: H05K1/02

CPC classification number: H05K1/0231 ,  H05K2201/09345 ,  H05K2201/09618 ,  H05K2201/09636 ,  H05K2201/10159 ,  H05K2201/10651

Abstract: A signal processing board includes a six-layer substrate. A plurality of signal transmission planes are formed in a first layer, a third layer, a fourth layer, and a sixth layer. A first ground plane is formed in a second layer. A first power supply plane is formed in a fifth layer and electrically connected to the first semiconductor element. A second power supply plane is formed in the fifth layer and electrically connected to the second semiconductor element. A second ground plane is formed in the fifth layer. A first bypass capacitor is electrically connected to the first power supply plane and the second ground plane. A second bypass capacitor is electrically connected to the second power supply plane and the second ground plane.

公开(公告)号：US12295093B2

公开(公告)日：2025-05-06

申请号：US18472051

申请日：2023-09-21

Applicant: KYOCERA Document Solutions Inc.

Inventor： Shotaro Ikegami

IPC: H05K1/02

Abstract: A signal processing board includes a six-layer substrate. A plurality of signal transmission planes are formed in a first layer, a third layer, a fourth layer, and a sixth layer. A first ground plane is formed in a second layer. A first power supply plane is formed in a fifth layer and electrically connected to the first semiconductor element. A second power supply plane is formed in the fifth layer and electrically connected to the second semiconductor element. A second ground plane is formed in the fifth layer. A first bypass capacitor is electrically connected to the first power supply plane and the second ground plane. A second bypass capacitor is electrically connected to the second power supply plane and the second ground plane.