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    MULTILAYER WIRING BOARD
    3.
    发明申请
    MULTILAYER WIRING BOARD 有权
    多层接线板

    公开(公告)号：US20140133115A1

    公开(公告)日：2014-05-15

    申请号：US13922349

    申请日：2013-06-20

    申请人： FUJI XEROX Co., Ltd.

    发明人： Daisuke IGUCHI

    IPC分类号： H05K1/02

    CPC分类号： H05K1/0243 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/162 ,  H05K1/181 ,  H05K2201/041 ,  H05K2201/09309 ,  H05K2201/09327 ,  H05K2201/09345 ,  H05K2201/09663

    摘要： A multilayer wiring board includes a signal electrode, a first power supply electrode, and a ground electrode, which are connected to a first element that outputs a signal, an electrode connected to a second element that receives the signal, a ground layer that serves as a return path for a return current of the signal, a first power supply layer that is disposed adjacent to the ground layer with a dielectric layer interposed therebetween and supplies electric power to the first element, and a second power supply layer that is provided independently of the first power supply layer and supplies electric power to the second element. The first power supply layer causes the return current to return to the first element through the first power supply electrode as a displacement current between the ground layer and the first power supply layer.

    摘要翻译： 多层布线板包括信号电极，第一电源电极和接地电极，它们连接到输出信号的第一元件，连接到接收信号的第二元件的电极，用作 用于所述信号的返回电流的返回路径，与所述接地层相邻设置有电介质层并且向所述第一元件提供电力的第一电源层和与所述第一电源层独立地设置的第二电源层， 第一电源层并且向第二元件供电。 第一电源层使返回电流通过第一电源电极返回到第一元件，作为接地层和第一电源层之间的位移电流。

    DIRECT CURRENT CAPACITOR MODULE
    4.
    发明申请
    DIRECT CURRENT CAPACITOR MODULE 有权
    直流电容器模块

    公开(公告)号：US20140085772A1

    公开(公告)日：2014-03-27

    申请号：US14014773

    申请日：2013-08-30

    申请人： SAMHWA CAPACITOR CO., LTD.

    发明人： Young Joo OH ,  Jung Rag YOON ,  Kyung Min LEE ,  Young Min YOO

    IPC分类号： H01G4/38

    CPC分类号： H01G4/38 ,  H01G2/06 ,  H01G4/40 ,  H05K1/0231 ,  H05K1/116 ,  H05K3/306 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2201/09345 ,  H05K2201/09718 ,  H05K2201/1034 ,  Y02T10/7022

    摘要： A direct current (DC) link capacitor module includes a printed circuit board (PCB) formed by sequentially disposing a first electrode substrate, an insulation substrate, a second electrode substrate, a third electrode substrate; a plurality of DC link capacitors connected in parallel to each of the first electrode substrate and the second electrode substrate; a plurality of first Y-capacitors connected in series to each of the first electrode substrate and the third electrode substrate, and connected in parallel to the DC link capacitors; and a plurality of second Y-capacitors connected in series to each of the first electrode substrate and the third electrode substrate, and connected in parallel to the first Y-capacitors, thereby achieving a miniaturization and facilitating a fabrication by connecting the plurality of DC link capacitors using the PCB.

    摘要翻译： 直流（DC）链路电容器模块包括通过顺序地布置第一电极基板，绝缘基板，第二电极基板，第三电极基板形成的印刷电路板（PCB） 与第一电极基板和第二电极基板中的每一个并联连接的多个DC链路电容器; 多个第一Y电容器，与第一电极基板和第三电极基板中的每一个串联连接，并联连接到直流链路电容器; 以及与第一电极基板和第三电极基板中的每一个串联连接并与第一Y电容器并联连接的多个第二Y电容器，从而实现小型化，并且通过将多个DC链路 电容使用PCB。

    Circuit board, semiconductor device including the same, memory module, memory system, and manufacturing method of circuit board
    5.
    发明申请
    Circuit board, semiconductor device including the same, memory module, memory system, and manufacturing method of circuit board 审中-公开
    电路板，包括其的半导体器件，存储器模块，存储器系统以及电路板的制造方法

    公开(公告)号：US20110051351A1

    公开(公告)日：2011-03-03

    申请号：US12805264

    申请日：2010-07-21

    申请人： Shiro Harashima

    发明人： Shiro Harashima

    IPC分类号： G06F1/16 ,  H01R12/30 ,  H05K7/02

    CPC分类号： H05K1/117 ,  H01R12/721 ,  H05K1/0263 ,  H05K1/0298 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/09172 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09345

    摘要： A circuit board according to the present invention includes a main surface, a back surface parallel to the main surface, a side surface positioned between edges of the main surface and the back surface, and first and second board terminals covering a portion of the main surface and a portion of the side surface, respectively. According to the present invention, because the board terminals are provided not only on the main surface but also on the side surface of the circuit board, the total number of board terminals can be increased while maintaining sufficient pitch and width of the board terminals.

    摘要翻译： 根据本发明的电路板包括主表面，平行于主表面的后表面，位于主表面和后表面的边缘之间的侧表面，以及覆盖主表面的一部分的第一和第二板端子 和侧面的一部分。 根据本发明，由于电路板端子不仅设置在电路板的主表面上，而且还设置在电路板的侧表面上，所以可以在保持板端子的足够的间距和宽度的同时增加电路板端子的总数。

    Multi-layered printed wiring board
    7.
    发明授权
    Multi-layered printed wiring board 有权
    多层印刷线路板

    公开(公告)号：US07199308B2

    公开(公告)日：2007-04-03

    申请号：US10949290

    申请日：2004-09-27

    申请人： Tohru Ohsaka

    发明人： Tohru Ohsaka

    IPC分类号： H01R12/04 ,  H05K1/11

    CPC分类号： H05K1/0216 ,  H05K2201/09336 ,  H05K2201/09345 ,  H05K2201/09354

    摘要： A multi-layered printed wiring board, capable of securing required wiring density even with a decreased number of wiring layers and reducing radiation noises, has at least three wiring layers each at least having at least one power supply line or a ground line, and another kind of line, the wiring layers each having an outer edge. A ground line is formed at the outer edge of at least one of the wiring layers. A basic power supply line is formed inside the ground line. At least one power supply line extends from the basic power supply line. A plurality of electronic parts are mounted on at least one of the wiring layers. The at least one power supply line is wired to mounting positions of the electronic parts via at least one of the wiring layers.

    摘要翻译： 即使在布线层数量的减少和辐射噪声减少的情况下，也能够确保所需布线密度的多层印刷布线板具有至少三个至少具有至少一个电源线或接地线的布线层，另外 各种线路，各层具有外缘。 在至少一个布线层的外边缘处形成接地线。 在地线内形成基本电源线。 至少一条电源线从基本电源线延伸。 多个电子部件安装在至少一个布线层上。 所述至少一个电源线通过所述布线层中的至少一个布线到所述电子部件的安装位置。

    Multilayer substrate for digital tuner and multilayer substrate
    8.
    发明申请
    Multilayer substrate for digital tuner and multilayer substrate 有权
    用于数字调谐器和多层基板的多层基板

    公开(公告)号：US20070069325A1

    公开(公告)日：2007-03-29

    申请号：US11516005

    申请日：2006-09-05

    申请人： Yasuhisa Yamanaka

    发明人： Yasuhisa Yamanaka

    IPC分类号： H01L29/00

    CPC分类号： H05K1/0216 ,  H05K1/0218 ,  H05K2201/0723 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/09663 ,  H05K2201/09972

    摘要： Mounting components such as LSIs, which emit noise to the outside and are subjected to the influence of external noise, on the top-most layer and the bottom-most layer respectively, a co-existing layer of the ground region and the power source region has been employed, where a ground region has been provided respectively to the range corresponding to the position the LSIs on the next layer below the top-most layer and the next layer above the bottom-most layer. Accordingly, the number of layers to be laminated to form the multilayer substrate has been reduced, because it is no longer required, unlike the related art, to provide a ground layer where the ground pattern is formed substantially over the entire surface of layer respectively to the next layer below the top-most layer having mounted a LSI thereon and of the next layer above the bottom-most layer having mounting a LSI thereon.

    摘要翻译： 分别在最上层和最底层上分别向外部发出噪声并受到外部噪声的影响的诸如LSI的安装部件，接地区域和电源区域的共存层 已经使用了地面区域分别设置在与最上层下面的下一层的LSI的位置相对应的范围和最底层以上的下一层的范围内。 因此，与现有技术不同，由于不再需要层叠以形成多层基板的层的数量，因此提供接地层，其基本上在层的整个表面上分别形成接地图案， 在其上安装有LSI的最上层的下一层和在其上安装有LSI的最底层之上的下一层。

    Leadframe-based module DC bus design to reduce module inductance
    9.
    发明授权
    Leadframe-based module DC bus design to reduce module inductance 有权
    基于引线框架的模块直流总线设计，减少模块电感

    公开(公告)号：US07193860B2

    公开(公告)日：2007-03-20

    申请号：US11292870

    申请日：2005-12-02

    申请人： Scott Parkhill ,  Sayeed Ahmed ,  Fred Flett

    发明人： Scott Parkhill ,  Sayeed Ahmed ,  Fred Flett

    IPC分类号： H01R9/00

    CPC分类号： H01L25/072 ,  H01L2223/665 ,  H01L2924/0002 ,  H02M7/003 ,  H05K1/0215 ,  H05K1/0237 ,  H05K1/0306 ,  H05K7/1432 ,  H05K2201/09345 ,  H05K2201/10446 ,  H05K2201/10636 ,  H05K2203/049 ,  Y02P70/611 ,  Y10T29/49002 ,  Y10T29/49009 ,  Y10T29/49117 ,  Y10T29/49126 ,  H01L2924/00

    摘要： A DC bus for use in a power module has a positive DC conductor bus plate parallel with a negative DC conductor bus plate. One or more positive leads are connected to the positive bus and are connectable to a positive terminal of a power source. One or more negative leads are connected to the negative bus and are connectable to a negative terminal of a power source. The DC bus has one or more positive connections fastenable from the positive bus to the high side of a power module. The DC bus also has one or more negative connections fastenable from the negative bus to the low side of the power module. The positive bus and negative bus permit counter-flow of currents, thereby canceling magnetic fields and their associated inductances, and the positive and negative bus are connectable to the center portion of a power module.

    摘要翻译： 用于电源模块的直流母线具有与负直流导体总线板平行的正直流导体母线板。 一个或多个正极引线连接到正极母线，并且可连接到电源的正极端子。 一个或多个负极引线连接到负母线并且可连接到电源的负极端子。 DC总线具有一个或多个正极连接，可从正极母线固定到电源模块的高侧。 DC总线还具有一个或多个从负母线固定到电源模块的低端的负极连接。 正母线和负母线允许电流逆流，从而消除磁场及其相关的电感，正负母线可连接到电源模块的中心部分。