公开(公告)号：US06356754B1

公开(公告)日：2002-03-12

申请号：US08819728

申请日：1997-03-18

申请人： Katsuyuki Onozawa ,  Fujio Inagami ,  Hiroshi Fujita ,  Osamu Kawano

发明人： Katsuyuki Onozawa ,  Fujio Inagami ,  Hiroshi Fujita ,  Osamu Kawano

IPC分类号： H04M1110

CPC分类号： H04M11/10 ,  H04M1/656 ,  H04M1/72519

摘要： In a mobile communication apparatus having a codec which codes first voice data into second voice data and decodes the second voice data into the first voice data, a memory in which the second voice data should be recorded and a silent data generating unit which generates silent data, the second voice data is successively recorded in the memory. While the second data is being recorded, the silent data is recorded in the memory as a substitute for the second voice data which is in a first state. The first state is a state in which the second voice data may be noise data.

摘要翻译： 在具有将第一语音数据编码为第二语音数据并将第二语音数据解码为第一语音数据的编解码器的移动通信装置中，应当记录第二语音数据的存储器和产生无声数据的无声数据生成单元 ，第二语音数据被连续记录在存储器中。 当正在记录第二数据时，无声数据被记录在存储器中作为处于第一状态的第二语音数据的替代。 第一状态是第二语音数据可以是噪声数据的状态。

公开(公告)号：US06181923B2

公开(公告)日：2001-01-30

申请号：US09049387

申请日：1998-03-27

申请人： Osamu Kawano ,  Fujio Inagami

发明人： Osamu Kawano ,  Fujio Inagami

IPC分类号： H04L2706

CPC分类号： H03J7/06

摘要： The present invention relates to the automatic frequency control circuit and the method of automatic frequency control. The automatic frequency control circuit for processing frequency control of a received signal frequency based on an incoming received signal comprises a first control circuit for processing frequency control based on a precision counter by using the incoming received signal and a second control circuit for processing frequency control based on a coarse counter by using the incoming received signal, wherein the first control circuit and the second control circuit are configured to be used interchangeably in response to the incoming received signal. By employing the circuit which directly counts the received signal and the circuit which counts the regenerative carrier signal in combination, the follow up range of the automatic frequency control circuit is thus expanded.

摘要翻译： 本发明涉及自动频率控制电路和自动频率控制的方法。 用于处理基于输入的接收信号的接收信号频率的频率控制的自动频率控制电路包括用于通过使用输入的接收信号来处理基于精度计数器的频率控制的第一控制电路和用于处理基于频率控制的第二控制电路 在粗计数器上通过使用输入的接收信号，其中第一控制电路和第二控制电路被配置为可以互换地用于响应于输入的接收信号。 通过采用对接收信号直接计数的电路和对再生载波信号进行计数的电路，自动频率控制电路的跟踪范围因此扩大。

公开(公告)号：US4884294A

公开(公告)日：1989-11-28

申请号：US160765

申请日：1988-02-26

申请人： Fujio Inagami

发明人： Fujio Inagami

IPC分类号： H04M19/04

CPC分类号： H04M19/04

摘要： A portable cordless telephone set for outputting various types of discrimination sounds, in radio communication with a base unit, and having a telephone transmission and reception portion. The portable cordless telephone set includes a sound generation control circuit having at least one microcomputer and receiving a discrimination sound request from the telephone transmission and reception portion; a clock generation circuit generating an operation clock of the sound generation control circuit; a sound generator generating sound having different sound pressures in response to different resonant frequencies, one of the resonant frequencies being adjacent to a frequency of the operation clock; a frequency divider circuit providing at least one divided frequency signal; a switch circuit selectively outputting a signal from the clock generation circuit and the frequency divider circuit; and a timing control circuit outputting an ON/OFF timing signal of the frequency signal received from the switch circuit to the sound generator. The sound generation control circuit energizes the switch circuit and sends a command to the timing control circuit in response to the received discrimination sound request.

公开(公告)号：US5058203A

公开(公告)日：1991-10-15

申请号：US354989

申请日：1989-05-22

申请人： Fujio Inagami

发明人： Fujio Inagami

IPC分类号： H04M1/00 ,  G06F1/04 ,  G06F1/32 ,  H04B1/16 ,  H04M1/73 ,  H04W52/02

CPC分类号： H04W52/0293 ,  H04W52/0274 ,  H04W52/029 ,  Y02B60/50

摘要： A mobile telephone terminal powered by a battery, which terminal is mainly comprised of a processor unit and a logic LSI unit as a control part thereof. The processor unit handles first control functions which are not used frequently but which are complicated and operate at a high clock speed. The logic LSI unit handles second control functions which are used constantly and frequently at a low clock speed. The processor unit is activated intermittently on demand by the logic LSI unit and thereby reduces power consumption.