-
公开(公告)号：US20080241980A1
公开(公告)日：2008-10-02
申请号：US12127546
申请日：2008-05-27
IPC分类号： H01L21/70
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
摘要翻译： 一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。 半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。 第二金属图案被半导体图案包围。
-
公开(公告)号：US20050082528A1
公开(公告)日：2005-04-21
申请号：US10973619
申请日：2004-10-27
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1368 , H01L29/04
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
-
公开(公告)号：US20050082527A1
公开(公告)日：2005-04-21
申请号：US10973402
申请日：2004-10-27
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1368 , H01L29/04 , H01L29/10 , H01L31/036
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
-
公开(公告)号：US07755088B2
公开(公告)日：2010-07-13
申请号：US12127574
申请日：2008-05-27
IPC分类号： H01L29/04
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
-
公开(公告)号：US07394097B2
公开(公告)日：2008-07-01
申请号：US10973619
申请日：2004-10-27
IPC分类号： H01L29/04
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
摘要翻译： 一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。 半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。 第二金属图案被半导体图案包围。
-
公开(公告)号：US20080231770A1
公开(公告)日：2008-09-25
申请号：US12127574
申请日：2008-05-27
IPC分类号： G02F1/133 , G02F1/1368
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
-
公开(公告)号：US06838696B2
公开(公告)日：2005-01-04
申请号：US09805039
申请日：2001-03-14
申请人： Kazuhiro Kobayashi , Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Ken Nakashima , Yuichi Masutani , Hironori Aoki
发明人： Kazuhiro Kobayashi , Nobuhiro Nakamura , Kazunori Inoue , Takuji Yoshida , Ken Nakashima , Yuichi Masutani , Hironori Aoki
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1368 , H01L29/04
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
摘要翻译： 一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。 半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。 第二金属图案被半导体图案包围。
-
公开(公告)号：US07645648B2
公开(公告)日：2010-01-12
申请号：US12127546
申请日：2008-05-27
IPC分类号： H01L21/00
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
摘要翻译： 一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。 半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。 第二金属图案被半导体图案包围。
-
公开(公告)号：US07084017B2
公开(公告)日：2006-08-01
申请号：US10973402
申请日：2004-10-27
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136236
摘要： A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.
摘要翻译： 一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。 半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。 第二金属图案被半导体图案包围。
-
10.发明授权In plane switching liquid crystal displaying apparatus for improved luminance including a thin film transistor array substrate 有权在包括薄膜晶体管阵列基板的改进亮度的平面切换液晶显示装置中公开(公告)号：US07362401B2
公开(公告)日：2008-04-22
申请号：US11028059
申请日：2005-01-04
IPC分类号： G02F1/1343 , G02F1/136 , G02F1/1333
CPC分类号： G02F1/134363 , G02F1/136227
摘要： An In Plane Switching (IPS) liquid crystal displaying apparatus includes a TFT array substrate, an opposite substrate opposed to the TFT array substrate and a liquid crystal interposed between the TFT array substrate and the opposite substrate. The TFT array substrate includes a plurality of driving electrodes formed on a passivation film and connected with the plurality of TFTs, a plurality of opposite electrodes formed on the passivation film, each of the plurality of opposite electrodes opposing the respective plurality of driving electrodes, and a plurality of common lines configured to connect each of the plurality of opposite electrodes with each of a plurality of pixels. The TFT array substrate provided with a light shielding formed in such a manner as to superpose one signal line of the plurality of signal lines and one opposite electrode of the plurality of opposite electrodes.
摘要翻译： 平面切换（IPS）液晶显示装置包括TFT阵列基板，与TFT阵列基板相对的相对基板和介于TFT阵列基板和相对基板之间的液晶。 TFT阵列基板包括形成在钝化膜上并与多个TFT连接的多个驱动电极，形成在钝化膜上的多个相对电极，多个相对电极中的每一个与相应的多个驱动电极相对，以及 多条公共线被配置为将多个相对电极中的每一个连接到多个像素中的每一个。 所述TFT阵列基板设置有以将所述多条信号线中的一条信号线和所述多个相对电极的一个相对电极叠加的方式形成的遮光部。
-
-
-
-
-
-
-
-
-
搜索结果
37 条记录 (耗时 0.022 秒)
