-
公开(公告)号:US20080211569A1
公开(公告)日:2008-09-04
申请号:US11712726
申请日:2007-03-01
IPC分类号: H03K17/687
CPC分类号: H03K17/6874 , H03K17/102 , H03K19/00315 , H03K2217/0018
摘要: A higher voltage switching circuit based on a standard process limits the lowest applied voltage to an intermediate voltage between the higher voltage and ground, instead of ground. In this way, the maximum electric field across the gate dielectric is greatly reduced. In additional the use of p-type triple well also reduces junction breakdown in some embodiments. This concept is also valid in the case where the high voltage is negative, in which case the intermediate voltage is also negative.
摘要翻译: 基于标准工艺的较高电压开关电路将最低施加电压限制在较高电压和地之间的中间电压,而不是接地。 以这种方式,大大减少了栅极电介质两端的最大电场。 另外,在一些实施例中,p型三重阱的使用也减少了结击穿。 这个概念在高电压为负的情况下也是有效的,在这种情况下中间电压也是负的。