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23 条记录 (耗时 0.032 秒)

    Rate adjustable backplane and method for a telecommunications node
    6.
    发明授权
    Rate adjustable backplane and method for a telecommunications node 有权
    速率可调背板和电信节点的方法

    公开(公告)号：US06760327B1

    公开(公告)日：2004-07-06

    申请号：US09452829

    申请日：1999-12-01

    申请人： Earl B. Manchester ,  Barry W. Field ,  Kenneth M. Buckland ,  Charles R. Dyer ,  Riccardo G. Dorbolo ,  Danny Thom ,  Jan C. Hobbel ,  Soren B. Pedersen ,  Thomas A. Potter

    发明人： Earl B. Manchester ,  Barry W. Field ,  Kenneth M. Buckland ,  Charles R. Dyer ,  Riccardo G. Dorbolo ,  Danny Thom ,  Jan C. Hobbel ,  Soren B. Pedersen ,  Thomas A. Potter

    IPC分类号： H04L1228

    CPC分类号： H04L49/606 ,  H04L12/6402

    摘要： A rate adjustable backplane includes a set of switch slots configured to receive one or more switch cards forming a switch core and a plurality of line slots each configured to receive a line card. A low speed bus couples the line slots to the set of switch slots. A high speed bus also couples the line slots to the set of switch slots. Each line slot includes a low speed connector coupled to the low speed bus and a high speed connector coupled to the high speed bus. The low speed connector is adapted to receive a mating connector of a line card to establish a low speed communication connection between the line card and the switch core. The high speed connector is adapted to receive a mating connector of the line card to establish a high speed link between the line card and the switch core.

    摘要翻译： 速率可调背板包括一组开关槽，其被配置为接收形成开关芯的一个或多个开关卡和多个配置成接收线卡的线槽。 低速总线将线路插槽连接到交换机插槽组。 高速总线也将线槽耦合到一组开关插槽。 每个线槽包括耦合到低速总线的低速连接器和耦合到高速总线的高速连接器。 低速连接器适于接收线路卡的匹配连接器，以在线路卡和交换机核心之间建立低速通信连接。 高速连接器适于接收线路卡的匹配连接器，以在线路卡和交换机核心之间建立高速链路。

    Method for universal channel allocation based on DS-0 channelized format
    7.
    发明授权
    Method for universal channel allocation based on DS-0 channelized format 有权
    基于DS-0信道化格式的通用信道分配方法

    公开(公告)号：US06434166B1

    公开(公告)日：2002-08-13

    申请号：US09364770

    申请日：1999-07-30

    申请人： Kenneth M. Buckland ,  Jan C. Hobbel ,  Earl B. Manchester

    发明人： Kenneth M. Buckland ,  Jan C. Hobbel ,  Earl B. Manchester

    IPC分类号： H04L1266

    CPC分类号： H04J3/125 ,  H04J3/1647

    摘要： A universal DS-0 channelized format is provided wherein selected states of CAS bits are used to indicate to the transport mechanism when DS-0 channels are not being used for voice and are available for use for data transport. In addition, the T1 frame format carries CAS bits only in the first DS-0 channel, so that robbed bits are disabled and not used to carry ABCD signaling bits, thereby avoiding any risk of data corruption. Still further, a special CAS signaling value not defined as a CAS state, is employed in a frame nibble instead of a frame counter to indicate that the state is in the first DS-0 slot.

    摘要翻译： 提供通用DS-0信道化格式，其中当DS-0信道未被用于语音并可用于数据传输时，CAS位的选择状态用于向传输机制指示。 此外，T1帧格式仅在第一DS-0信道中携带CAS比特，因此抢占比特被禁用，不用于携带ABCD信令比特，从而避免数据损坏的风险。 另外，在帧半字节而不是帧计数器中采用未被定义为CAS状态的特殊CAS信令值，以指示状态处于第一DS-0时隙。

    System and method for eliminating jitter by using a starve/inspect approach to AAL1
    8.
    发明授权
    System and method for eliminating jitter by using a starve/inspect approach to AAL1 有权
    通过使用AAL1的饥饿/检查方法消除抖动的系统和方法

    公开(公告)号：US06618399B1

    公开(公告)日：2003-09-09

    申请号：US09428303

    申请日：1999-10-27

    申请人： Kenneth M. Buckland ,  Barry W. Field

    发明人： Kenneth M. Buckland ,  Barry W. Field

    IPC分类号： H04J306

    CPC分类号： H04L12/5601 ,  H04L2012/5649 ,  H04L2012/5654

    摘要： A system and method for transporting telephony signals across an ATM network using AAL1 while eliminating the jitter associated with the AAL1 cells. The present invention uses starve/inspect techniques to dynamically buffer the ATM frames such that jitter associated with the cells can be reduced while avoiding unneeded buffering that would cause excessive delay.

    摘要翻译： 一种用于通过AAL1在ATM网络上传送电话信号的系统和方法，同时消除与AAL1小区相关联的抖动。 本发明使用饥饿/检查技术来动态缓冲ATM帧，使得可以减少与小区相关联的抖动，同时避免不必要的缓冲，这将导致过多的延迟。

    Synchronous switch and method for a telecommunications node
    9.
    发明授权
    Synchronous switch and method for a telecommunications node 失效
    电信节点的同步开关和方法

    公开(公告)号：US06778529B1

    公开(公告)日：2004-08-17

    申请号：US09452751

    申请日：1999-12-01

    申请人： Barry W. Field ,  Kenneth M. Buckland ,  Riccardo G. Dorbolo

    发明人： Barry W. Field ,  Kenneth M. Buckland ,  Riccardo G. Dorbolo

    IPC分类号： H04L1264

    CPC分类号： H04L49/602 ,  H04L49/102 ,  H04L49/606

    摘要： A synchronous switch for a telecommunications node includes a switch interface, a switch controller, and a switch memory. The switch interface is operable to terminate a bus and to receive from the bus a frame having a plurality of time slots. The time slots are each operable to transport a traffic cell. The switch controller is operable to determine a type for each traffic cell received at the switch interface and to determine based on the type for a traffic cell an address for storing the traffic cell in the switch memory. The switch memory is operable to receive the traffic cell from the switch interface and the address for storing the traffic cell from the switch controller and to store the traffic cell at the address.

    摘要翻译： 用于电信节点的同步开关包括开关接口，开关控制器和开关存储器。 开关接口可操作以终止总线并从总线接收具有多个时隙的帧。 时隙可用于传输业务信元。 交换机控制器可操作以确定在交换机接口处接收的每个业务小区的类型，并且基于业务小区的类型来确定用于在交换机存储器中存储业务小区的地址。 交换机存储器可操作以从交换机接口接收业务信元，以及用于存储来自交换机控制器的业务信元的地址，并将业务信元存储在该地址处。

    Fused switch core and method for a telecommunications node
    10.
    发明授权
    Fused switch core and method for a telecommunications node 有权
    用于电信节点的熔断开关核心和方法

    公开(公告)号：US06621828B1

    公开(公告)日：2003-09-16

    申请号：US09452759

    申请日：1999-12-01

    申请人： Barry W. Field ,  Kenneth M. Buckland ,  Charles R. Dyer ,  Riccardo G. Dorbolo ,  Danny Thom ,  Jan C. Hobbel ,  Soren B. Pedersen ,  Thomas A. Potter

    发明人： Barry W. Field ,  Kenneth M. Buckland ,  Charles R. Dyer ,  Riccardo G. Dorbolo ,  Danny Thom ,  Jan C. Hobbel ,  Soren B. Pedersen ,  Thomas A. Potter

    IPC分类号： H04J316

    CPC分类号： H04Q11/04 ,  H04Q2213/13103 ,  H04Q2213/1329 ,  H04Q2213/13292 ,  H04Q2213/13299 ,  H04Q2213/13361 ,  H04Q2213/13362 ,  H04Q2213/13393

    摘要： A switch card for telecommunications node includes a shared memory operable to store traffic channels. A time slot interchanger (TSI) is coupled to a first bus and to the shared memory. The TSI is operable based on predefined switching instructions to access the shared memory to stored traffic channels received from the first bus and to retrieve traffic channels for transmission on the first bus. An asynchronous transfer mode (ATM) switch is operable to switch a traffic cell based on header information in the traffic cell. A traffic converter is operable to convert traffic channels retrieved from the shared memory to traffic cells for processing by a bus fuser and to convert traffic cells to traffic channels for storage in the shared memory. The bus fuser is coupled to the shared memory through the traffic converter, the ATM switch, and a second bus. The bus fuser is operable to receive a traffic cell from each one of the traffic converter, the ATM switch, and the second bus and to route the traffic cell to another one of the traffic converter, the ATM switch, and the second bus.

    摘要翻译： 用于电信节点的交换卡包括可操作以存储业务信道的共享存储器。 时隙交换器（TSI）耦合到第一总线和共享存储器。 TSI可以基于预定义的切换指令来操作，以将共享存储器存储到从第一总线接收的存储的业务信道，并且检索用于在第一总线上传输的业务信道。 异步传输模式（ATM）交换机可操作以基于业务信元中的报头信息来切换业务信元。 业务转换器可操作以将从共享存储器检索的业务信道转换成业务信元以供总线定影器处理，并将业务信元转换为业务信道以存储在共享存储器中。 总线定影器通过流量转换器，ATM交换机和第二总线耦合到共享存储器。 总线定影器可操作以从业务转换器，ATM交换机和第二总线中的每一个接收业务信元，并将业务小区路由到业务转换器，ATM交换机和第二总线中的另一个。