公开(公告)号：US4064620A

公开(公告)日：1977-12-27

申请号：US652943

申请日：1976-01-27

Applicant: Don H. Lee ,  Kenneth P. Weller ,  Robert S. Ying ,  William F. Thrower

Inventor： Don H. Lee ,  Kenneth P. Weller ,  Robert S. Ying ,  William F. Thrower

IPC: H01L21/265 ,  H01L21/58 ,  H01L29/06 ,  H01L29/864 ,  B01J17/00

CPC classification number: H01L24/83 ,  H01L21/26513 ,  H01L24/26 ,  H01L29/0657 ,  H01L29/864 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/07802 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12033 ,  H01L2924/12034 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10S438/928

Abstract: Disclosed are new high frequency ion implanted passivated semiconductor devices and a planar fabrication process therefor wherein initially an ion implantation and PN junction passivation mask is formed on one surface of a semiconductor crystal. Thereafter, one or more conductivity type determining ion species are implanted through an opening in the mask and into the semiconductor crystal to form active device regions including a PN junction, all of which are bounded by an annular, higher resistivity unimplanted region of the semiconductor crystal. The PN junction thus formed terminates beneath the implantation and passivation mask, and the semiconductor crystal is then annealed to remove ion implantation damage and to electrically activate the ion implanted regions, while simultaneously controlling the lateral movement of the PN junction beneath the passivation mask. Such annealing does not adversely affect the conductivity and passivation characteristics of either the higher resistivity annular region or the passivation mask, and the resultant device structure exhibits a small degradation in high frequency performance relative to comparable state of the art unpassivated devices. Devices fabricated with the present new passivated geometry have a structure with sufficient mechanical strength to allow direct mounting into high frequency circuits (of the microwave waveguide-cavity type) without the use of additional package arrangements.

Abstract translation: 公开了新的高频离子注入钝化半导体器件及其平面制造工艺，其中最初在半导体晶体的一个表面上形成离子注入和PN结钝化掩模。 此后，通过掩模中的开口将一种或多种导电类型的确定离子种类注入到半导体晶体中，以形成包括PN结的有源器件区域，所有这些器件区域都由半导体晶体的环形较高电阻率的未被注入的区域限定 。 由此形成的PN结终止在注入和钝化掩模之下，然后退火半导体晶体以去除离子注入损伤并电激活离子注入区，同时控制PN结在钝化掩模下面的横向移动。 这种退火不会对较高电阻率的环形区域或钝化掩模的导电性和钝化特性产生不利影响，并且所得到的器件结构相对于本领域未被激活的器件的可比较状态显示出高频率性能的小的劣化。 使用本新型钝化几何制造的器件具有足够的机械强度的结构，以允许直接安装到微波波导腔类型的高频电路中，而不需要额外的封装结构。

公开(公告)号：US4091408A

公开(公告)日：1978-05-23

申请号：US762547

申请日：1977-01-24

Applicant: Don H. Lee ,  Kenneth P. Weller ,  William F. Thrower

Inventor： Don H. Lee ,  Kenneth P. Weller ,  William F. Thrower

IPC: H01L21/265 ,  H01L21/329 ,  H01L21/74 ,  H01L21/768 ,  H01L23/36 ,  H01L29/864 ,  H01L29/06 ,  H01L23/02

CPC classification number: H01L29/864 ,  H01L21/26513 ,  H01L21/74 ,  H01L21/76898 ,  H01L23/36 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/3011

Abstract: The specification describes new high frequency ion implanted semiconductor devices, novel microwave integrated circuits employing same, and a planar fabrication process for both wherein initially an ion implantation and PN junction passivation mask is formed on one surface of a semiconductor substrate. Next a heavily doped buried region is ion implanted through an opening in the mask and into the substrate to a preselected controlled depth. Thereafter, one or more additional ion implants are made through the mask opening to complete the active device regions and a PN junction therebetween, all of which are bounded by an annular, higher resistivity unimplanted region of the semiconductor substrate. The PN junction thus formed terminates beneath the implantation and passivation mask, and the semiconductor substrate is then annealed to remove ion implantation damage and to electrically activate the ion implanted regions, while simultaneously controlling the lateral movement of the PN junction beneath the passivation mask. Such annealing does not adversely affect the conductivity and passivation characteristics of either the higher resistivity region or the passivation mask. Openings to the heavily doped buried regions in the substrate are made both opposite and coaxial to the openings in the passivation mask. Precision in the area and depth of these contact openings is achieved by use of a chemical etchant that is preferential to the substrate crystallographic orientation and the impurity concentration levels. Ohmic contact metallization is deposited into the contact openings after which the heat sink metallization is applied to either or both of the metallized contact regions.

Abstract translation: 本说明书描述了新的高频离子注入半导体器件，采用其的新型微波集成电路以及用于两者的平面制造工艺，其中最初在半导体衬底的一个表面上形成离子注入和PN结钝化掩模。 接下来，重掺杂的掩埋区域通过掩模中的开口离子注入到衬底中到预选的受控深度。 此后，通过掩模开口制造一个或多个另外的离子注入，以完成有源器件区域和它们之间的PN结，所有这些都由半导体衬底的环形较高电阻率的未被注入的区域界定。 由此形成的PN结终止在注入和钝化掩模下面，然后退火半导体衬底以去除离子注入损伤并电激活离子注入区，同时控制钝化掩模下面的PN结的横向移动。 这种退火不会对较高电阻率区域或钝化掩模的导电性和钝化特性产生不利影响。 衬底中重掺杂掩埋区的开口与钝化掩模中的开口相对并且同轴。 通过使用优先于衬底结晶取向和杂质浓度水平的化学腐蚀剂来实现这些接触开口的面积和深度的精确度。 欧姆接触金属化沉积到接触开口中，之后将散热器金属化施加到金属化接触区域中的一个或两个。

公开(公告)号：US4030943A

公开(公告)日：1977-06-21

申请号：US688662

申请日：1976-05-21

Applicant: Don H. Lee ,  Kenneth P. Weller ,  William F. Thrower

Inventor： Don H. Lee ,  Kenneth P. Weller ,  William F. Thrower

IPC: H01L21/265 ,  H01L21/329 ,  H01L21/74 ,  H01L21/768 ,  H01L23/36 ,  H01L29/864

CPC classification number: H01L29/864 ,  H01L21/26513 ,  H01L21/74 ,  H01L21/76898 ,  H01L23/36 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/3011

Abstract: The specification describes new high frequency ion implanted semiconductor devices, novel microwave integrated circuits employing same, and a planar fabrication process for both wherein initially an ion implantation and PN junction passivation mask is formed on one surface of a semiconductor substrate. Next, a heavily doped buried region is ion implanted through an opening in the mask and into the substrate to a preselected controlled depth. Thereafter, one or more additional ion implants are made through the mask opening to complete the active device regions and a PN junction therebetween, all of which are bounded by an annular, higher resistivity unimplanted region of the semiconductor substrate. The PN junction thus formed terminates beneath the implantation and passivation mask, and the semiconductor substrate is then annealed to remove ion implantation damage and to electrically activate the ion implanted regions, while simultaneously controlling the lateral movement of the PN junction beneath the passivation mask. Such annealing does not adversely affect the conductivity and passivation characteristics of either the higher resistivity region or the passivation mask. Openings to the heavily doped buried regions in the substrate are made both opposite and coaxial to the openings in the passivation mask. Precision in the area and depth of these contact openings is achieved by use of a chemical etchant that is preferential to the substrate crystallographic orientation and the impurity concentration levels. Ohmic contact metallization is deposited into the contact openings after which the heat sink metallization is applied to either or both of the metallized contact regions. A mesa is formed to provide discrete structures with the implanted device region surrounded by a ring of high-resistivity semiconductor and thick low-loss dielectric. The resultant device structure exhibits a small degradation in high frequency performance relative to comparable state of the art unpassivated devices.

公开(公告)号：US3974459A

公开(公告)日：1976-08-10

申请号：US589107

申请日：1975-06-23

Applicant: Kenneth P. Weller

Inventor： Kenneth P. Weller

IPC: H03B1/00 ,  H03B7/14 ,  H03B9/14 ,  H03F3/10 ,  H03F3/60

CPC classification number: H03B9/145 ,  H03B2009/126 ,  H03B2201/014 ,  H03B7/14

Abstract: Disclosed is a millimeter wave waveguide structure adapted for operation with negative resistance devices, such as solid state avalanche breakdown diodes, at frequencies up to about 170 GHz or higher. A central portion of the structure is formed by a cylindrical metallic impedance transformer and bias pin which has a major face thereof substantially parallel to a common lower waveguide wall of the structure. A negative resistance device is DC coupled between this common waveguide wall and one edge of the impedance transformer, so that the impedance transformer also provides the required DC bias to the negative resistance device. Other portions of the waveguide structure include a first upper waveguide wall, immediately adjacent one side of the impedance transformer, and this wall, together with the common lower waveguide wall, forms a tuning cavity into which a sliding tuning short is positioned. Another portion of the waveguide structure includes a second, upper waveguide wall immediately adjacent the opposite side of the impedance transformer, and this wall together with the common lower waveguide wall, confines millimeter wave power from the negative resistance device to a predetermined path and direction. Suitable waveguide transition means are coupled to the second upper waveguide wall for coupling the above structure to a full height waveguide.

Abstract translation: 公开了适用于在高达约170GHz或更高的频率下与负电阻装置（例如固态雪崩击穿二极管）一起工作的毫米波波导结构。 该结构的中心部分由圆柱形金属阻抗变压器和偏置销形成，该偏置销的主要面基本上平行于该结构的公共下部波导壁。 负电阻器件直流耦合在该公共波导壁和阻抗变换器的一个边缘之间，使得阻抗变换器还向负电阻器件提供所需的DC偏置。 波导结构的其他部分包括紧邻阻抗变压器的一侧的第一上波导壁，并且该壁与公共下波导壁一起形成调谐空腔，滑动调谐短路定位在该调谐腔中。 波导结构的另一部分包括紧邻阻抗变换器的相对侧的第二上波导壁，并且该壁与公共的下波导壁一起将来自负电阻装置的毫米波功率限制到预定的路径和方向。 合适的波导过渡装置耦合到第二上波导壁，用于将上述结构耦合到全高波导。