公开(公告)号：US20240055363A1

公开(公告)日：2024-02-15

申请号：US18446236

申请日：2023-08-08

Applicant: Kioxia Corporation

Inventor： Susumu YAMAMOTO ,  Hideki MATSUSHIGE ,  Gen TOYOTA

IPC: H01L23/544 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L23/544 ,  H01L24/08 ,  H01L24/06 ,  H01L23/481 ,  H01L24/80 ,  H01L2224/08145 ,  H01L2223/54426 ,  H01L2224/06515 ,  H01L2224/0603 ,  H01L2224/8013

Abstract: There is provided a semiconductor device including a first chip and a second chip bonded to the first chip. The first chip includes a first alignment mark provided in a first region of a bonding surface and a plurality of first dummy pads provided in a second region of the bonding surface different from the first region. The second chip includes a second alignment mark provided on the bonding surface corresponding to the first alignment mark and a plurality of second dummy pads provided in a region of the bonding surface different from the second alignment mark. A coverage of the first alignment mark in the first region is substantially the same as the coverage of the first dummy pads in the second region.

公开(公告)号：US20230101002A1

公开(公告)日：2023-03-30

申请号：US17694080

申请日：2022-03-14

Applicant: Kioxia Corporation

Inventor： Gen TOYOTA ,  Satoshi HONGO ,  Tatsuo MIGITA ,  Susumu YAMAMOTO ,  Tsutomu FUJITA ,  Eiichi SHIN ,  Yukio KATAMURA ,  Hideki MATSUSHIGE ,  Kazuki TAKAHASHI

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48 ,  H01L23/31 ,  H01L21/56

Abstract: A semiconductor device including a base substrate B, which includes wire layers, chips C1, C2, C3, C4, C5, and C6 provided on the base substrate B, and a protective film P provided on each of the side faces of the chips C1, C2, C3, C4, C5, and C6.