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公开(公告)号:US20220077185A1
公开(公告)日:2022-03-10
申请号:US17350513
申请日:2021-06-17
Applicant: Kioxia Corporation
Inventor: Kenichi IDE , Hiroko TAHARA
IPC: H01L27/11582 , H01L23/522 , H01L23/532 , H01L21/768
Abstract: A semiconductor device according to an embodiment includes a stacked body including a plurality of conductive layers and a plurality of first insulation layers alternately stacked in a first direction. The conductive layers each include a first metal layer and a second metal layer. The first metal layer contains a first metal element and a substance that is chemically reactive with a material gas containing the first metal element. The second metal layer contains the first metal element and has a lower content of the substance than the first metal layer. The first metal layer is disposed between the first insulation layers and the second metal layer.
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公开(公告)号:US20220293464A1
公开(公告)日:2022-09-15
申请号:US17469291
申请日:2021-09-08
Applicant: Kioxia Corporation
Inventor: Kenichi IDE
IPC: H01L21/768 , H01L23/522
Abstract: A semiconductor manufacturing method includes forming a concave portion in a layer provided above a substrate from a top surface of the layer downwards, the layer including an insulation layer at least partially. The method includes forming a silicon film on an inner surface of the concave portion. The method includes exposing the silicon film to a raw material gas of metal and an inhibitor gas that inhibits growth of the metal at a first temperature, to replace a first portion of the silicon film located in an upper-end side portion of the concave portion with a first conductive film containing the metal. The method includes exposing the silicon film to the raw material gas and the inhibitor gas at a second temperature lower than the first temperature, to replace a second portion of the silicon film with a second conductive film containing the metal.
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公开(公告)号:US20210407905A1
公开(公告)日:2021-12-30
申请号:US17447332
申请日:2021-09-10
Applicant: Kioxia Corporation
Inventor: Takashi SHIMIZU , Takashi FUKUSHIMA , Naomi FUKUMAKI , Hiroko TAHARA , Kenichi IDE
IPC: H01L23/522 , H01L23/532 , H01L27/11556 , H01L27/11582 , H01L21/768
Abstract: According to one embodiment, a semiconductor memory device includes: a plurality of first conductive layers that each include tungsten; a plurality of insulating films that include a stacked portion and a first projecting portion projecting; a semiconductor layer extending through an inside of a stacked body; a charge storage layer arranged between the plurality of first conductive layers and the semiconductor layer; a plurality of second conductive layers that are each arranged on the first projecting portion in such a manner as to be in contact with a single first conductive layer and that include silicon containing an impurity; and a plurality of contact plugs that are each provided on a single second conductive layer in such a manner as to be in contact with the single second conductive layer.
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