公开(公告)号：US11948636B2

公开(公告)日：2024-04-02

申请号：US17693935

申请日：2022-03-14

Applicant: Kioxia Corporation

Inventor： Yoshiki Kamata ,  Yoshiaki Asao ,  Yukihiro Nomura ,  Misako Morota ,  Daisaburo Takashima ,  Takahiko Iizuka ,  Shigeru Kawanaka

IPC: G11C13/00 ,  G11C5/06 ,  H10B63/00 ,  H10N70/00

CPC classification number: G11C13/0069 ,  G11C5/06 ,  H10B63/30 ,  H10N70/826 ,  G11C2013/0078 ,  G11C2213/75

Abstract: According to one embodiment, a memory device includes a stacked structure including a plurality of conductive layers stacked to be apart from each other in a first direction, and a pillar structure including a resistance change portion extending in the first direction in the stacked structure, and a semiconductor portion which extends in the first direction in the stacked structure and which includes a first portion provided along the resistance change portion and a second portion extending from the first portion in at least one direction intersecting the first direction.