公开(公告)号：US20240112732A1

公开(公告)日：2024-04-04

申请号：US18460493

申请日：2023-09-01

Applicant: Kioxia Corporation

Inventor： Yu SHIMADA ,  Ryousuke TAKIZAWA ,  Akira KATAYAMA

IPC: G11C13/00

CPC classification number: G11C13/0069 ,  G11C13/0038 ,  G11C13/004

Abstract: A memory device includes a memory cell connected between first and second signal lines, a first wiring connected to the first signal line, a second wiring connected to the second signal line, and a precharging circuit connected to the first wiring. During a write sequence, the precharging circuit charges the first signal line and the first wiring, the memory cell is activated according to a voltage difference between the first signal line and the second signal line, and a write current generated from parasitic capacitances of both the charged first signal line and the charged first wiring flows from the first wiring to the second wiring via the activated memory cell.