公开(公告)号：US20140212764A1

公开(公告)日：2014-07-31

申请号：US14350386

申请日：2013-07-23

申请人： Kohei Fujita ,  Kiyoshi Nouzuka ,  Shota Iwasaki ,  Junichi Nishizawa ,  Kazuma Saito ,  Hiroyuki Ishiguro

发明人： Kohei Fujita ,  Kiyoshi Nouzuka ,  Shota Iwasaki ,  Junichi Nishizawa ,  Kazuma Saito ,  Hiroyuki Ishiguro

IPC分类号： H01M4/74

CPC分类号： H01M4/742 ,  H01M4/685 ,  H01M4/73 ,  H01M4/82 ,  H01M10/06 ,  Y02E60/126 ,  Y02P70/54 ,  Y10T29/10

摘要： [Object] To regularize a potential distribution at a grid, prevent local corrosion, and lengthen product lifetime.[Solution Means] A storage battery grid includes: a frame bone 2 that includes a substantially rectangular shape; a lug portion 21 that is formed upward from an upper side 2a of the frame bone 2; one or more main vertical bone 3X that extend downward from the lug portion 21 in the frame bone 2; plural slanted bones 4 that extend obliquely from the upper side 2a toward a lower side 2b, at least the slanted bones branching from the main vertical bone 3X, which is a center, toward both sides. The slanted bones 4 are arranged at intervals in a direction in which the main vertical bone 3X extends, and at least part of plural spaces, which are defined by the main vertical bone 3X partially forming a side of the spaces, include a substantially quadrilateral shape.

摘要翻译： [对象]规范电网的电位分布，防止局部腐蚀，延长产品寿命。 蓄电池栅格包括：骨架2，其包括大致矩形的形状; 从骨架2的上侧2a向上方形成的突出部21; 从框架骨2中的突出部21向下延伸的一个或多个主垂直骨3X; 从上侧2a向下侧2b倾斜延伸的多个倾斜骨4，至少从两侧分别从作为中心的主垂直骨3X的倾斜骨。 倾斜骨4沿主垂直骨3X延伸的方向间隔设置，并且由主垂直骨3X限定的多个空间的至少一部分，其部分地形成空间的一侧，包括大致四边形的形状 。

公开(公告)号：US06815619B2

公开(公告)日：2004-11-09

申请号：US09768633

申请日：2001-01-24

申请人： Shota Iwasaki ,  Takehito Inaba

发明人： Shota Iwasaki ,  Takehito Inaba

IPC分类号： H05K103

CPC分类号： H01L23/49838 ,  H01L2924/0002 ,  H05K1/0218 ,  H01L2924/00

摘要： A circuit board including a base member, an interconnect layer formed on a part of the base member, an electrically-floating conductive layer formed on a substantially remaining part of the base member and having an edge adjacent to an edge of the interconnect layer, and a dielectric layer covering a part of the interconnect layer and an entire surface of the electrically-floating conductive layer and filling a gap between the edge of the interconnect layer and the edge of the electrically-floating conductive layer. In accordance with the present invention, almost all the surface of the base member is covered with the interconnect layer and the floating conductive layer disposed parallel to each other on a substantially single plane. In the circuit board, the moisture does not enter into the rear surface of the dielectric layer through the externally exposed portion to improve the packaging rank.

摘要翻译： 一种电路板，包括基底构件，形成在所述基底构件的一部分上的互连层，形成在所述基底构件的基本上剩余部分上并且具有与所述互连层的边缘相邻的边缘的电浮动导电层，以及 覆盖所述互连层的一部分的电介质层和所述电浮动导电层的整个表面，并填充所述互连层的边缘和所述电浮动导电层的边缘之间的间隙。 根据本发明，基本构件的几乎所有表面都被互连层和浮动导电层覆盖，所述互连层和浮动导电层在基本上单一的平面上彼此平行设置。 在电路板中，水分不会通过外部暴露部分进入电介质层的后表面，以提高封装等级。

公开(公告)号：US6103574A

公开(公告)日：2000-08-15

申请号：US357958

申请日：1999-07-21

申请人： Shota Iwasaki

发明人： Shota Iwasaki

IPC分类号： G11C16/04 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/336 ,  H01L21/36 ,  H01L21/76 ,  H01L27/10

CPC分类号： H01L27/11521

摘要： In a non-volatile semiconductor memory device making electrical writing and erasing possible, source diffusion layers arranged on a substrate and along at least control gate electrodes have, in one part thereof, inclined portions having an angle larger than an ion implantation angle. According to this, device isolation technique is used to lower the resistance of the source diffusion layer.

摘要翻译： 在能够进行电写入和擦除的非易失性半导体存储器件中，布置在衬底上并沿至少控制栅电极的源极扩散层在其一部分中具有角度大于离子注入角度的倾斜部分。 据此，使用器件隔离技术来降低源极扩散层的电阻。

公开(公告)号：US07253363B2

公开(公告)日：2007-08-07

申请号：US10964284

申请日：2004-10-12

申请人： Shota Iwasaki ,  Takehito Inaba

发明人： Shota Iwasaki ,  Takehito Inaba

IPC分类号： H05K1/03

CPC分类号： H01L23/49838 ,  H01L2924/0002 ,  H05K1/0218 ,  H01L2924/00

摘要： A circuit board including a base member, an interconnect layer formed on a part of the base member, an electrically-floating conductive layer formed on a substantially remaining part of the base member and having an edge adjacent to an edge of the interconnect layer, and a dielectric layer covering a part of the interconnect layer and an entire surface of the electrically-floating conductive layer and filling a gap between the edge of the interconnect layer and the edge of the electrically-floating conductive layer. In accordance with the present invention, almost all the surface of the base member is covered with the interconnect layer and the floating conductive layer disposed parallel to each other on a substantially single plane. In the circuit board, the moisture does not enter into the rear surface of the dielectric layer through the externally exposed portion to improve the packaging rank.

摘要翻译： 一种电路板，包括基底构件，形成在所述基底构件的一部分上的互连层，形成在所述基底构件的基本上剩余部分上并且具有与所述互连层的边缘相邻的边缘的电浮动导电层，以及 覆盖所述互连层的一部分的电介质层和所述电浮动导电层的整个表面，并填充所述互连层的边缘和所述电浮动导电层的边缘之间的间隙。 根据本发明，基本构件的几乎所有表面都被互连层和浮动导电层覆盖，所述互连层和浮动导电层在基本上单一的平面上彼此平行设置。 在电路板中，水分不会通过外部暴露部分进入电介质层的后表面，以提高封装等级。

公开(公告)号：US20050045371A1

公开(公告)日：2005-03-03

申请号：US10964284

申请日：2004-10-12

申请人： Shota Iwasaki ,  Takehito Inaba

发明人： Shota Iwasaki ,  Takehito Inaba

IPC分类号： H01L23/12 ,  H01L23/498 ,  H05K1/02 ,  H05K1/11

CPC分类号： H01L23/49838 ,  H01L2924/0002 ,  H05K1/0218 ,  H01L2924/00

摘要： A circuit board including a base member, an interconnect layer formed on a part of the base member, an electrically-floating conductive layer formed on a substantially remaining part of the base member and having an edge adjacent to an edge of the interconnect layer, and a dielectric layer covering a part of the interconnect layer and an entire surface of the electrically-floating conductive layer and filling a gap between the edge of the interconnect layer and the edge of the electrically-floating conductive layer. In accordance with the present invention, almost all the surface of the base member is covered with the interconnect layer and the floating conductive layer disposed parallel to each other on a substantially single plane. In the circuit board, the moisture does not enter into the rear surface of the dielectric layer through the externally exposed portion to improve the packaging rank.

摘要翻译： 一种电路板，包括基底构件，形成在所述基底构件的一部分上的互连层，形成在所述基底构件的基本上剩余部分上并且具有与所述互连层的边缘相邻的边缘的电浮动导电层，以及 覆盖所述互连层的一部分的电介质层和所述电浮动导电层的整个表面，并填充所述互连层的边缘和所述电浮动导电层的边缘之间的间隙。 根据本发明，基本构件的几乎所有表面都被互连层和浮动导电层覆盖，所述互连层和浮动导电层在基本上单一的平面上彼此平行设置。 在电路板中，水分不会通过外部暴露部分进入电介质层的后表面，以提高封装等级。