公开(公告)号：US20250078918A1

公开(公告)日：2025-03-06

申请号：US18819404

申请日：2024-08-29

Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

Inventor： Jongsun PARK ,  Kyeong-ho LEE ,  Junwoo PARK

IPC: G11C11/419 ,  G06F7/544 ,  G11C11/412

Abstract: Disclosed is a computing-in-memory device, which includes a memory cell array including a plurality of local arrays that generates a first output signal and a second output signal by performing a multiply-accumulate (MAC) operation on an input signal applied through a plurality of operation word lines and a stored weight, a reference voltage generator that generates a reference voltage by sharing charges of the first output signal with adjacent global bit lines, and an analog-to-digital converter that compares the reference voltage with the second output signal and converts the second output signal into a digital signal based on a result of the comparison.

公开(公告)号：US20240127873A1

公开(公告)日：2024-04-18

申请号：US18342013

申请日：2023-06-27

Applicant: Korea University Research and Business Foundation

Inventor： Jongsun PARK ,  Joonhyung KIM ,  Kyeong-ho LEE

IPC: G11C7/16 ,  G11C7/10 ,  G11C8/08

CPC classification number: G11C7/16 ,  G11C7/1069 ,  G11C8/08

Abstract: Disclosed is a computing-in-memory device, which includes a memory cell array including an analog multiplication unit that performs a multiply-accumulate (MAC) operation on a pre-stored weight and a first analog voltage corresponding to multi-bit input data, and a driver that applies the multi-bit input data to the analog multiplication unit, and the analog multiplication unit includes a digital-to-analog converter that converts the multi-bit input data into the first analog voltage.