公开(公告)号：US20100019117A1

公开(公告)日：2010-01-28

申请号：US12572477

申请日：2009-10-02

申请人： Kuan-Chou CHEN ,  Tzong-Ming Wu

发明人： Kuan-Chou CHEN ,  Tzong-Ming Wu

IPC分类号： H01L21/68 ,  H01L21/673 ,  F16M13/00

CPC分类号： H01L21/67369 ,  Y10S414/13 ,  Y10S414/136 ,  Y10T74/20

摘要： Disclosed is a six-bar linkage positioning mechanism mounted inside a clean container formed of a locating member and a four-bar linkage and a driving module which, when moved, has the slide of the driving module stopped at the base of the cleaning container and be forced to move upwards relative to a sliding way inside the locating member and to cause the driving link of the driving module to drive the four-bar linkage upwards and to further force the second link of the four-bar linkage to push workpieces in respective insertion slots in a cassette on the clean container. The six-bar linkage positioning mechanism has only one degree of freedom so that it moves workpieces horizontally in the cassette into position by means of contact at a point, preventing contamination due to friction and also improving moving stability.

摘要翻译： 本发明公开了一种六杆连杆定位机构，其安装在由定位构件和四杆联动器形成的清洁容器内部，并且驱动模块在移动时具有停止在清洁容器的基部处的驱动模块的滑动件， 被迫相对于定位构件内的滑动方向向上移动，并且使得驱动模块的驱动连杆向上驱动四杆联动装置，并且进一步迫使四杆联动装置的第二连杆件将工件推向相应的 插入插槽在清洁容器上的盒子中。 六杆连杆定位机构仅具有一个自由度，使得其通过一点处的接触将工件在盒中水平移动到位，防止由摩擦引起的污染并且还提高移动稳定性。

公开(公告)号：US20130192521A1

公开(公告)日：2013-08-01

申请号：US13753728

申请日：2013-01-30

申请人： Chi-Pao CHU ,  I-Tang JIANG ,  Sz-Hsiao CHEN ,  Kuan-Yi YANG ,  Kuan-Chou CHEN ,  Yi-Hui LEE ,  Chin-Kuei WEN

发明人： Chi-Pao CHU ,  I-Tang JIANG ,  Sz-Hsiao CHEN ,  Kuan-Yi YANG ,  Kuan-Chou CHEN ,  Yi-Hui LEE ,  Chin-Kuei WEN

IPC分类号： B05C21/00

CPC分类号： B05C21/005 ,  C23C14/042 ,  H01L27/1288

摘要： The disclosure provides a compensating design method for a shadow mask including: providing a first shadow mask having a first opening pattern and a first material pattern; disposing the first shadow mask on a substrate having a predetermined depositing film area with first and second sides; performing a deposition process by using the first shadow mask as a mask to form a film on an actual depositing film area, wherein the distance between the first and the third sides is a first bias, and the distance between the second and the fourth sides is a second bias, and a single side gray zone of the actual depositing film area relative to the predetermined depositing film area is substantially half of the sum of the first and the second biases; and designing a second shadow mask according to the single side gray zone.

摘要翻译： 本发明提供了一种用于荫罩的补偿设计方法，包括：提供具有第一开口图案和第一材料图案的第一荫罩; 将第一荫罩设置在具有第一和第二面的具有预定沉积膜区域的基板上; 通过使用第一荫罩作为掩模进行沉积处理，以在实际的沉积膜区域上形成膜，其中第一和第三面之间的距离是第一偏压，第二和第四面之间的距离为 相对于预定沉积膜区域的实际沉积膜区域的第二偏压和单侧灰色区域基本上是第一和第二偏压之和的一半; 并根据单侧灰色区域设计第二个荫罩。

公开(公告)号：US20070067580A1

公开(公告)日：2007-03-22

申请号：US11553332

申请日：2006-10-26

申请人： Kuan-Chou CHEN

发明人： Kuan-Chou CHEN

IPC分类号： G06F12/00 ,  G06F13/00

CPC分类号： G06F13/1684 ,  G06F13/385 ,  G06F13/4239

摘要： A memory access interface for connecting a memory to a micro-controller having an address/data multiplexing bus and a microprocessor is proposed The memory access interface includes an address latch, a multiplexer, and a data buffer The address latch latches and outputs the lower-bit address signal on the address/data multiplexing bus of the micro-controller when an address-latch-enable signal is enabled. The multiplexer receives the lower-bit address signal latched by the address latch, a higher-bit address signal outputted from the micro-controller and an address signal outputted from the microprocessor and selectively outputs the address signal of the micro-controller or the address signal of the microprocessor as the address signal of the memory according to a first control signal. The data buffer transmits the signal of the data bus of the memory to the address/data multiplexing bus of the micro-controller during a data cycle of the micro-controller and maintains a high impedance state during an address cycle of the micro-controller.

摘要翻译： 提出了一种用于将存储器连接到具有地址/数据复用总线和微处理器的微控制器的存储器访问接口。存储器访问接口包括地址锁存器，多路复用器和数据缓冲器。地址锁存器锁存并输出下位机， 当地址锁存使能信号被使能时，微控制器的地址/数据复用总线上的位地址信号。 复用器接收由地址锁存器锁存的低位地址信号，从微控制器输出的较高位地址信号和从微处理器输出的地址信号，并有选择地输出微控制器的地址信号或地址信号 的微处理器作为根据第一控制信号的存储器的地址信号。 数据缓冲器在微控制器的数据周期期间将存储器的数据总线的信号发送到微控制器的地址/数据复用总线，并在微控制器的寻址周期期间保持高阻抗状态。