Method and apparatus for communication between two or more processing elements
    1.
    发明申请
    Method and apparatus for communication between two or more processing elements 失效
    用于在两个或多个处理元件之间进行通信的方法和装置

    公开(公告)号:US20060225074A1

    公开(公告)日:2006-10-05

    申请号:US11095341

    申请日:2005-03-30

    IPC分类号: G06F9/46

    CPC分类号: G06F9/52 G06F9/522

    摘要: A technique for performing barrier synchronization among a plurality of program threads. More particularly, at least one embodiment of the invention keeps track of completed tasks associated with a number of program threads using bits within a barrier register that can be updated and reassigned without incurring the amount of bus traffic as in the prior art.

    摘要翻译: 一种用于在多个程序线程之间执行屏障同步的技术。 更具体地,本发明的至少一个实施例使用可以被更新和重新分配的屏障寄存器内的位来跟踪与多个程序线程相关联的完成的任务,而不会像现有技术那样产生总线流量。

    Method and apparatus for communication between two or more processing elements
    2.
    发明授权
    Method and apparatus for communication between two or more processing elements 失效
    用于在两个或多个处理元件之间进行通信的方法和装置

    公开(公告)号:US08645959B2

    公开(公告)日:2014-02-04

    申请号:US11095341

    申请日:2005-03-30

    IPC分类号: G06F9/46

    CPC分类号: G06F9/52 G06F9/522

    摘要: A technique for performing barrier synchronization among a plurality of program threads. More particularly, at least one embodiment of the invention keeps track of completed tasks associated with a number of program threads using bits within a barrier register that can be updated and reassigned without incurring the amount of bus traffic as in the prior art.

    摘要翻译: 一种用于在多个程序线程之间执行屏障同步的技术。 更具体地,本发明的至少一个实施例使用可以被更新和重新分配的屏障寄存器内的位来跟踪与多个程序线程相关联的完成的任务,而不会像现有技术那样产生总线流量。

    Transaction based shared data operations in a multiprocessor environment
    3.
    发明申请
    Transaction based shared data operations in a multiprocessor environment 有权
    多处理器环境中基于事务的共享数据操作

    公开(公告)号:US20060161740A1

    公开(公告)日:2006-07-20

    申请号:US11027623

    申请日:2004-12-29

    IPC分类号: G06F13/00

    摘要: The apparatus and method described herein are for handling shared memory accesses between multiple processors utilizing lock-free synchronization through transactional-execution. A transaction demarcated in software is speculatively executed. During execution invalidating remote accesses/requests to addresses loaded from and to be written to shared memory are track by a transaction buffer. If an invalidating access is encountered, the transaction is re-executed. After a pre-determined number of times re-executing the transaction, the transaction may be re-executed non-speculatively with locks/semaphores.

    摘要翻译: 本文描述的装置和方法用于通过事务执行来处理利用无锁同步的多个处理器之间的共享存储器访问。 在软件中划分的事务被推测执行。 在执行期间,无效远程访问/请求到从共享存储器加载并被写入到共享存储器的地址由事务缓冲器跟踪。 如果遇到无效访问,则重新执行该事务。 在重新执行事务的预定次数之后,可以非推测地用锁/信号量重新执行事务。

    Pocket knife
    4.
    外观设计

    公开(公告)号:USD1008774S1

    公开(公告)日:2023-12-26

    申请号:US29836470

    申请日:2022-04-27

    摘要: FIG. 1 is a left perspective view of a pocket knife embodying the new design with the blade deployed;
    FIG. 2 is a right side elevation view of the pocket knife, with the blade deployed;
    FIG. 3 is a left side elevation view of the pocket knife, with the blade deployed;
    FIG. 4 is a top plan view of the pocket knife, with the blade deployed;
    FIG. 5 is a bottom plan view of the pocket knife, with the blade deployed;
    FIG. 6 is a front side elevation view of the pocket knife, with the blade deployed;
    FIG. 7 is a rear side elevation view of the pocket knife, with the blade deployed;
    FIG. 8 is a right side elevation view of the pocket knife, with the blade deployed;
    FIG. 9 is a left side elevation view of the pocket knife, with the blade deployed;
    FIG. 10 is a top plan view of the pocket knife, with the blade retracted; and,
    FIG. 11 is a bottom plan view of the pocket knife, with the blade retracted.
    The broken lines depict portions of the pocket knife in which the design is embodied that are not considered part of the claimed design.

    Surface mount vehicle anti-ram security systems
    8.
    发明授权
    Surface mount vehicle anti-ram security systems 有权
    表面贴装车辆防撞安全系统

    公开(公告)号:US08277143B2

    公开(公告)日:2012-10-02

    申请号:US12779011

    申请日:2010-05-12

    IPC分类号: E01F15/00

    CPC分类号: E01F13/12 E01F9/685

    摘要: Anti-ram systems according to embodiments of the invention comprise at least one bollard section comprising a base of limited height and a plurality of spaced bollards extending upwardly from the base. An anti-ram system according to embodiments of the invention may be erected or installed on a paved surface such as asphalt, concrete, paver stones, etc., or on an unpaved surface such as soil, and need not be partially of fully buried, and yet can qualify for Department of State crash ratings previously assigned to buried bollard systems. Disclosed anti-ram system also comprise a plurality of bollard sections and one or more connectors for interconnecting two or more of the bollard sections, and may also include an anchor or anchor system engaging at least each end of a bollard section not connected to another bollard section. The bollard sections may be filled with ballast and high friction structure may be attached to the bottom of the bollard sections to resist sliding after impact.

    摘要翻译: 根据本发明的实施例的防冲压系统包括至少一个包括有限高度的底座和从基座向上延伸的多个间隔的支柱的护柱部分。 根据本发明的实施例的反冲压系统可以竖立或安装在诸如沥青,混凝土,摊铺机石头等的铺设的表面上,或者在未铺设的表面例如土壤上,并且不需要部分地完全埋没, 而且还可以符合先前分配给埋地系柱系的国务院崩溃评级。 公开的反冲系统还包括多个系柱部分和一个或多个连接器,用于互连两个或更多个系柱部分,并且还可以包括锚固系统或锚固系统,其至少与不连接到另一个系柱的系柱部分 部分。 护柱部分可以填充压载物,并且高摩擦结构可以附接到系柱部分的底部以抵抗冲击后的滑动。