摘要:
A gate driver for a display device includes a plurality of shift registers to sequentially generate output signals during a frame period in response to multi-phase clocks; and a dummy clock provided to the plurality of shift registers during a vertical blank time to reduce a stress voltage in the shift registers, wherein an output of each of the shift registers is reset to a low state power supply voltage by an output signal of the next shift register.
摘要:
Disclosed herein is an LCD device having a drive area directly formed inside a non-pixel area of a substrate without an additional drive IC. The LCD device includes a first substrate having a pixel area and a non-pixel area disposed peripherally to the pixel area. The pixel area has a thin film transistor and a pixel electrode in each sub-pixel defined by gate and data lines crossing each other. A second substrate formed in opposition to the first substrate includes a color filter layer and a black matrix layer. A liquid crystal layer is formed between the first and second substrates. An opening in the black matrix layer reveals an alignment mark, which is disposed on at least one of the first substrate and the second substrate.
摘要:
A shift register includes first and second stages for sequentially outputting scan pulses to drive first and second gate lines. One of the first and second stages includes a pull-up switching device connected to an enabling node of the one of the first and second stages; a first pull-down switching device connected to a first disabling node of the one of the first and second stages; a second pull-down switching device connected to a second disabling node of the one of the first and second stages; and a node controller. The node controller of the first stage controls the logic state of each of the enabling node of the first stage, the first disabling node of the first stage and the first disabling node of the second stage. The node controller of the second stage controls the logic state of each of the enabling node of the second stage, the second disabling node of the second stage and the second disabling node of the first stage.
摘要:
An liquid crystal display device includes a source line between first and second drain lines, a first and second gate lines between the first drain line and the source line and between the second drain line and the source line, a plurality of first and second drain electrodes extending from the first and second drain lines, and a plurality of first and second source electrodes extending in first and second directions from the source line, wherein the plurality of first source electrodes are alternated with the plurality of first drain electrodes on the first gate line, and the plurality of second source electrodes are alternated with the plurality of second drain electrodes on the second gate line.
摘要:
An organic light emitting diode (OLED) display device for reducing the number of lines of an organic light emitting diode panel is provided. The OLED display device includes first and second data lines; a power voltage supply line supplied with a power supply voltage; a gate line crossing the first data line, the second data line and the power voltage supply line; first and second organic light emitting diodes commonly connected to the power voltage supply line; a first organic light emitting diode driving circuit for driving the first organic light emitting diode with a data voltage from the first data line in response to a scanning signal from the gate line; and a second organic light emitting diode driving circuit for driving the second organic light emitting diode with a data voltage from the second data line in response to the scanning signal from the gate line.
摘要:
A liquid crystal display device is disclosed which includes first, second and third data lines arranged in one direction, a data driver for alternately supplying a data signal of a first polarity and a data signal of a second polarity to each of the first, second and third data lines during an interval of two horizontal periods, first and second gate lines arranged to cross the first to third data lines, a gate driver for sequentially driving the first and second gate lines, and first red, first green, first blue, second red, second green and second blue pixels located between the first gate line and the second gate line and arranged in order along the first and second gate lines. The first red pixel cell is connected to one side of the first data line and the second gate line. The first green pixel cell is connected to the other side of the first data line and the first gate line. The first blue pixel cell is connected to one side of the second data line and the first gate line. The second red pixel cell is connected to the other side of the second data line and the second gate line. The second green pixel cell is connected to one side of the third data line and the first gate line. The second blue pixel cell is connected to the other side of the third data line and the second gate line.
摘要:
An organic light emitting diode drive circuit includes an organic light emitting diode which emits light with a current, a first transistor, a second transistor and a stress compensation circuit. The first transistor supplies a data voltage to a first node in response to a scan pulse. The second transistor controls a current flowing in the organic light emitting diode by the data voltage on the first node. The stress compensation circuit discharges the first node in response to a reset pulse. The organic light emitting diode driving circuit is adaptive to compensate characteristic changes of the organic light emitting diode drive circuit.
摘要:
An Organic light emitting diode display device includes: a pixel array having a plurality of scan lines and a plurality of data lines that cross each other, a plurality of power voltage supply lines to which a high level power supply voltage is supplied and that are substantially parallel to the data lines, a plurality of reset lines substantially parallel to the scan lines, a plurality of organic light emitting diodes that emit light due to the high level power supply voltage from the power voltage supply line, and a plurality of organic light emitting diode drive circuits that drive the organic light emitting diode with data from the data line in response to a scan signal from the scan line and that is initialized in response to a reset signal from the reset line; a scan drive circuit that supplies the scan signal to the scan lines; a reset drive circuit that supplies the reset signal to the reset lines that initializes the organic light emitting diode drive circuit; and a data drive circuit that supplies the data to the data lines respectively, wherein the scan drive circuit and the reset drive circuit are on a substrate including the pixel array.
摘要:
A gate driver and a repairing method are disclosed, wherein the gate driver is provided with one or more plurality of auxiliary stages that can substitute for a disabled stage, the gate driver including a shift register provided with a plurality of first output lines; at least three output repairing lines arranged across the first output lines; at least two clock transmission lines to transmit at least two clock pulses of different phases; at least one clock repairing line arranged across the clock transmission lines; and at least one auxiliary stage connected to the output repairing lines and to the at least one clock repairing line.
摘要:
A liquid crystal display device is disclosed which includes first, second and third data lines arranged in one direction, a data driver for alternately supplying a data signal of a first polarity and a data signal of a second polarity to each of the first, second and third data lines during an interval of two horizontal periods, first and second gate lines arranged to cross the first to third data lines, a gate driver for sequentially driving the first and second gate lines, and first red, first green, first blue, second red, second green and second blue pixels located between the first gate line and the second gate line and arranged in order along the first and second gate lines. The first red pixel cell is connected to one side of the first data line and the second gate line. The first green pixel cell is connected to the other side of the first data line and the first gate line. The first blue pixel cell is connected to one side of the second data line and the first gate line. The second red pixel cell is connected to the other side of the second data line and the second gate line. The second green pixel cell is connected to one side of the third data line and the first gate line. The second blue pixel cell is connected to the other side of the third data line and the second gate line.