公开(公告)号：US5949728A

公开(公告)日：1999-09-07

申请号：US989936

申请日：1997-12-12

Applicant: Kwo-Jen Liu ,  Chuck Cheuk-Wing Cheng

Inventor： Kwo-Jen Liu ,  Chuck Cheuk-Wing Cheng

IPC: G11C7/06 ,  G11C16/28 ,  G11C7/00

CPC classification number: G11C16/28 ,  G11C7/067

Abstract: A single ended sensing scheme amplifies the logic state stored within a non-volatile memory circuit by relying upon three stages, a clamping circuit, a first operational amplifier and a second operational amplifier. The clamping circuit clamps the voltage at a voltage level with a small voltage swing between the logic states. The first stage and second stage operational amplifiers increase the clamped voltage level. A reference memory circuit ensures that the sensing scheme output is properly adjusted to compensate for voltage and temperature variations as well as noise injection from the power supply and ground.

Abstract translation: 单端感测方案通过依靠三个阶段来放大存储在非易失性存储器电路内的逻辑状态，钳位电路，第一运算放大器和第二运算放大器。 钳位电路在逻辑状态之间以小的电压摆幅将电压钳位在电压电平。 第一级和第二级运算放大器增加了钳位电压电平。 参考存储器电路确保感测方案输出被适当地调整以补偿电压和温度变化以及来自电源和接地的噪声注入。