公开(公告)号：US07303957B2

公开(公告)日：2007-12-04

申请号：US11517254

申请日：2006-09-08

申请人： Kyeong-koo Chi ,  Seung-pil Chung ,  Chang-jin Kang ,  Jai-hyuk Song

发明人： Kyeong-koo Chi ,  Seung-pil Chung ,  Chang-jin Kang ,  Jai-hyuk Song

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A method of fabricating a flash memory device using a process for forming a self-aligned floating gate is provided. The method comprises forming mask patterns on a substrate, etching the substrate using the mask patterns as an etch mask to form a plurality of trenches, and filling the trenches with a first insulating layer, wherein sidewalls of the mask patterns remain exposed after filling the trenches with the first insulating layer. The method further comprises forming spacers on the exposed sidewalls of the mask patterns, filling upper insulating spaces with a second insulating layer thereby defining isolation layers, and removing the mask patterns and the spacers.

公开(公告)号：US20070059876A1

公开(公告)日：2007-03-15

申请号：US11517254

申请日：2006-09-08

申请人： Kyeong-koo Chi ,  Seung-pil Chung ,  Chang-jin Kang ,  Jai-hyuk Song

发明人： Kyeong-koo Chi ,  Seung-pil Chung ,  Chang-jin Kang ,  Jai-hyuk Song

IPC分类号： H01L21/8238

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A method of fabricating a flash memory device using a process for forming a self-aligned floating gate is provided. The method comprises forming mask patterns on a substrate, etching the substrate using the mask patterns as an etch mask to form a plurality of trenches, and filling the trenches with a first insulating layer, wherein sidewalls of the mask patterns remain exposed after filling the trenches with the first insulating layer. The method further comprises forming spacers on the exposed sidewalls of the mask patterns, filling upper insulating spaces with a second insulating layer thereby defining isolation layers, and removing the mask patterns and the spacers.

摘要翻译： 提供了一种使用用于形成自对准浮动栅极的工艺来制造闪速存储器件的方法。 该方法包括在衬底上形成掩模图案，使用掩模图案蚀刻衬底作为蚀刻掩模以形成多个沟槽，并用第一绝缘层填充沟槽，其中掩模图案的侧壁在填充沟槽之后保持暴露 与第一绝缘层。 该方法还包括在掩模图案的暴露的侧壁上形成间隔物，用第二绝缘层填充上绝缘空间，从而限定隔离层，以及去除掩模图案和间隔物。

公开(公告)号：US09824759B2

公开(公告)日：2017-11-21

申请号：US14609072

申请日：2015-01-29

申请人： Dae-woong Kwon ,  Jai-hyuk Song ,  Chang-sub Lee

发明人： Dae-woong Kwon ,  Jai-hyuk Song ,  Chang-sub Lee

IPC分类号： G11C16/10 ,  G11C16/04

CPC分类号： G11C16/10 ,  G11C16/0483

摘要： In a method of programming a non-volatile memory device, a first voltage is applied to a selected memory cell for programming, and a second voltage is applied to a non-selected memory cell. Before the second voltage rises to a predetermined voltage level, which is less than a program voltage level, the first voltage is greater than the second voltage or the second voltage is maintained at greater than a ground voltage level. Related non-volatile memory devices and memory systems are also discussed.