Abstract:
A memory reduction device of a stereoscopic image display includes a compression unit configured to receive first to fourth input data belonging to Gn and comprised of K1 bit, respectively, align the first to fourth input data in order of a data size to generate first to fourth alignment data, generate first to fourth compression data groups including first and second compression data having K2 bits smaller than K1 bits and third compression data having K3 bits smaller than K2 bits based on the first to fourth alignment data, derive an outlier from the first to fourth input data by using a deviation between the first to fourth alignment data, select any one of the first to fourth compression data groups, as the compressed Gn−1 according to the presence or absence of the outlier and an outlier derivation position.
Abstract:
A stereoscopic image display and a driving method thereof are discussed. The stereoscopic image display includes a data driving circuit that supplies a data voltage to data lines of a display panel; a gate driving circuit that supplies a gate pulse to gate lines of the display panel; and a timing controller that controls operation timings of the data driving circuit and gate driving circuit. The gate driving circuit delays a rising timing of the gate pulse to a point in time after a rising edge time of the data voltage in a 3D mode for displaying a 3D image on the display panel, under a control of the timing controller.
Abstract:
A stereoscopic image display device according to an exemplary embodiment of the present invention comprises: a display panel comprising data lines, gate lines, and a plurality of pixels; a data modulation unit that outputs modulated 3D image data by modulating kth pixel data of a jth line based on the kth pixel data of the jth line and kth pixel data of a line adjacent to the jth line; a data driving circuit that converts the modulated 3D image data into analog data voltages and outputs the analog data voltages to the data lines; and a gate driving circuit that sequentially outputs gate pulses to the gate lines.