Abstract:
Discussed is a method of manufacturing a LCD device, the method including: forming a gate in each of a plurality of pixel areas on a substrate; forming a gate insulator to cover the gate; forming a semiconductor layer on the gate insulator, and forming a photoresist (PR) on the semiconductor layer; doping high-concentration impurities at the semiconductor layer by using the photoresist (PR) as a mask to form an active layer, a source, and a drain; and doping low-concentration impurities at the semiconductor layer by using the photoresist (PR) as the mask to form a lightly doped drain (LDD) between the active layer and the source and between the active layer and the drain.
Abstract:
Disclosed is LCD device and a method of manufacturing the same, which increases a margin between the channel width and length (W/L) of a thin film transistor having a multi-gate structure, wherein the device comprises a substrate where a plurality of pixel regions are defined by a data line and a gate line; an active layer formed at each of a plurality of pixel regions of the substrate; a gate electrode comprising a plurality of multi-patterns overlapping with the active layer with an insulation layer therebetween; and a data electrode electrically connected to the active layer, wherein the multi-patterns are formed in straight by compensating pattern distortion of an edge portion of a gate pattern, and formed with the gate pattern which is designed to comprise a plurality of compensation patterns.
Abstract:
Discussed are a liquid crystal display (LCD) device and a method of manufacturing the LCD device. The LCD device can include a plurality of pixel areas defined by intersections of a plurality of gate lines and a plurality of data lines, a gate disposed in each of the plurality of pixel areas, a gate insulator disposed to cover the gate, an active layer disposed on only the gate with the gate insulator therebetween, a thin film transistor (TFT) configured to include a source, which is disposed at a first side of the active layer, and a drain disposed at a second side of the active layer, a pixel electrode connected to the drain of the TFT and configured to supply a data voltage to a corresponding pixel area, a common electrode configured to supply a common voltage to the corresponding pixel area, and a lightly doped drain (LDD) disposed between the active layer and the source and between the active layer and the drain. At least a portion of the LDD can be disposed on the gate.