公开(公告)号：US20140120643A1

公开(公告)日：2014-05-01

申请号：US14146514

申请日：2014-01-02

Applicant: LG DISPLAY CO., LTD.

Inventor： Sun-Woo Kim ,  Jae-Kyun Lee ,  Jae-Young Oh ,  Dae-Jung Choi

IPC: G02F1/1362

CPC classification number: G02F1/136277 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/1288

Abstract: A liquid crystal display device includes an array substrate including: gate and data lines crossing each other on a first substrate to define a pixel region; a common line in parallel with the gate line; first and second common line patterns extending from the common line, wherein the data line is between the first and second common line patterns; a thin film transistor connected to the gate and data lines; a pixel electrode connected to the thin film transistor and in the pixel region; and an inorganic black matrix below the gate line, the common line, and the first and second common lines, wherein the inorganic black matrix below the first and second common lines shields the data line; an opposing substrate including a common electrode on a second substrate; and a liquid crystal layer between the array substrate and the opposing substrate.

Abstract translation: 一种液晶显示装置，包括：阵列基板，包括：第一基板上彼此交叉的栅极和数据线，以限定像素区域; 与栅极线并联的公共线; 从所述公共线延伸的第一和第二公共线图案，其中所述数据线在所述第一和第二公共线图案之间; 连接到栅极和数据线的薄膜晶体管; 连接到薄膜晶体管和像素区域中的像素电极; 以及栅极线以下的无机黑色矩阵，公共线以及第一和第二公共线，其中，所述第一和第二公共线下方的无机黑色矩阵屏蔽所述数据线; 在第二基板上包括公共电极的相对基板; 以及阵列基板和相对基板之间的液晶层。

公开(公告)号：US08854567B2

公开(公告)日：2014-10-07

申请号：US14146514

申请日：2014-01-02

Applicant: LG Display Co., Ltd.

Inventor： Sun-Woo Kim ,  Jae-Kyun Lee ,  Jae-Young Oh ,  Dae-Jung Choi

IPC: G02F1/136 ,  H01L27/12 ,  G02F1/1362

CPC classification number: G02F1/136277 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/1288

Abstract: A liquid crystal display device includes an array substrate including: gate and data lines crossing each other on a first substrate to define a pixel region; a common line in parallel with the gate line; first and second common line patterns extending from the common line, wherein the data line is between the first and second common line patterns; a thin film transistor connected to the gate and data lines; a pixel electrode connected to the thin film transistor and in the pixel region; and an inorganic black matrix below the gate line, the common line, and the first and second common lines, wherein the inorganic black matrix below the first and second common lines shields the data line; an opposing substrate including a common electrode on a second substrate; and a liquid crystal layer between the array substrate and the opposing substrate.