公开(公告)号：US10056024B2

公开(公告)日：2018-08-21

申请号：US15136804

申请日：2016-04-22

Applicant: LG Display Co., Ltd.

Inventor： HwaYoung Kim ,  ByungMu Jung ,  SangSoo Han ,  SungJoon Moon

IPC: G09G3/20 ,  H01L27/32 ,  G09G3/3266 ,  G09G3/36

CPC classification number: G09G3/2092 ,  G09G3/3266 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2310/0267 ,  G09G2310/027 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/061 ,  G09G2310/08 ,  H01L27/3276

Abstract: A display device is disclosed, which may supply gate signals to allow pulse widths of gate signals supplied to adjacent gate lines to be overlapped with each other and at the same time minimize cost increase caused by increase of the number of line memories. The display device comprises a display panel, a gate driver and a timing controller. The display panel includes gate lines, data lines and pixels provided at crossing areas between the gate lines and the data lines. The gate driver supplies gate signals to the gate lines. The timing controller supplies a start signal and gate clock signals for controlling an operation timing of the gate driver to the gate driver. One frame period includes an active period for supplying the gate signals to the gate lines and a vertical blank period for not supplying the gate signals to the gate lines, and the start signal is supplied within the vertical blank period.