公开(公告)号：US09391099B2

公开(公告)日：2016-07-12

申请号：US14276903

申请日：2014-05-13

Applicant: LG Display Co., Ltd.

Inventor： Cheol-Se Kim ,  Jae-Hyung Jo ,  Duk-Keun Yoo

IPC: G02F1/136 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1362

CPC classification number: H01L27/1288 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2001/136295 ,  G02F2202/103 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/458 ,  H01L29/78669 ,  H01L29/78696

Abstract: An array substrate for a liquid crystal display device includes a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode; an active layer of intrinsic amorphous silicon on the gate insulating layer and corresponding to the gate electrode; an ohmic contact layer of impurity-doped amorphous silicon on the active layer; a data line crossing the gate line; a source electrode on the ohmic contact layer and connected to the data line; a drain electrode on the ohmic contact layer and spaced apart from the source electrode; a passivation layer on the source and drain electrodes and including a drain contact hole exposing a portion of the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the drain contact hole.

Abstract translation: 用于液晶显示装置的阵列基板包括在基板上的栅极线和栅电极，栅电极连接到栅极线; 栅极线上的栅极绝缘层和栅电极; 栅极绝缘层上的对应于栅电极的本征非晶硅的有源层; 有源层上杂质掺杂非晶硅的欧姆接触层; 跨越栅极线的数据线; 欧姆接触层上的源电极并连接到数据线; 欧姆接触层上的漏电极并与源电极间隔开; 在所述源电极和漏电极上的钝化层，并且包括暴露所述漏电极的一部分的漏极接触孔; 以及钝化层上的像素电极，并通过漏极接触孔与漏电极连接。

公开(公告)号：US10732471B2

公开(公告)日：2020-08-04

申请号：US16113336

申请日：2018-08-27

Applicant: LG Display Co., Ltd.

Inventor： Sang-Wook Lee ,  Duk-Keun Yoo

IPC: G02F1/1362 ,  H01L27/12 ,  G02F1/1334 ,  G02F1/1333

Abstract: An array substrate for a display device includes: a substrate having a plurality of pixel regions; a plurality of gate lines on the substrate, each of the plurality of gate lines including a plurality of gate patterns spaced apart from each other; a plurality of data lines crossing the plurality of gate lines to define the plurality of pixel regions; and a first connecting pattern connecting the plurality of gate patterns, the first connecting pattern having a different layer from the plurality of gate lines.

公开(公告)号：US09881944B2

公开(公告)日：2018-01-30

申请号：US15180970

申请日：2016-06-13

Applicant: LG Display Co., LTD.

Inventor： Cheol-Se Kim ,  Jae-Hyung Jo ,  Duk-Keun Yoo

IPC: G02F1/136 ,  H01L27/12 ,  H01L29/786 ,  H01L29/45 ,  G02F1/1362

CPC classification number: H01L27/1288 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2001/136295 ,  G02F2202/103 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/458 ,  H01L29/78669 ,  H01L29/78696

Abstract: A method of fabricating an array substrate for a liquid crystal display device can include forming a gate line and a gate electrode, and a gate insulating layer; forming an active layer on the gate insulating layer and an ohmic contact layer on the active layer; forming a data line and source and drain electrodes; forming a passivation layer on the source and drain electrodes; and forming a pixel electrode on the passivation layer, in which the ohmic contact layer covers an entire top surface of the active layer between the source and drain electrodes; forming a metallic layer on the gate insulating layer and the ohmic contact layer; etching the metallic layer to faun the data line, and the source drain electrodes, in which a silicide layer is formed on the ohmic contact layer only in the space between the source and drain electrodes; and removing the silicide layer.