Abstract:
A shift register of the present disclosure includes a plurality of stages. Each stage includes transistors belonging to a first group for activating a Q node, transistors belonging to a second group for discharging odd and even QB nodes, transistors belonging to a third group for being activated by the odd and even QB nodes and for discharging the Q node, and a sensing circuit for sensing a threshold voltage of at least one of the transistor belonging to the third group at a period when the Q node is discharged. The shift register of the present disclosure avoids the problem of erroneous operation due to lowering of device characteristics.
Abstract:
A display device includes a display panel having a display area and a non-display area and a polyimide substrate. The display device includes a transistor disposed above the substrate in the display area, a flexible film disposed on a side surface of the non-display area and connected to the substrate, and a conductive layer disposed below the substrate and applied with a low potential power voltage from the flexible film to improve an edge burn-in due to the polarization by offsetting positive charges in the polyimide substrate.
Abstract:
The present disclosure relates to a shift register, and more particularly, a shift register having a sensing circuit for quantitatively measuring a threshold voltage shifted level of a thin film transistor, which is deteriorated due to a continuously applied direct-current (DC) voltage, in a shift register having thin film transistors using oxide silicon as an active layer.The present disclosure may provide a shift register capable of overcoming an erroneous operation caused due to lowering of device characteristics, by further connecting a sensing transistor to thin film transistors configuring the shift register formed on a display panel to sense a level of threshold voltage shift, and driving the shift register by dividing one frame into odd and even periods according to the sensing result.
Abstract:
A display device includes a display panel having a display area and a non-display area and a polyimide substrate. The display device includes a transistor disposed above the substrate in the display area, a flexible film disposed on a side surface of the non-display area and connected to the substrate, and a conductive layer disposed below the substrate and applied with a low potential power voltage from the flexible film to improve an edge burn-in due to the polarization by offsetting positive charges in the polyimide substrate.
Abstract:
The present invention relates to a display panel including a static electricity preventing pattern and a display device having the same. An aspect of the present invention provides a display device or a display panel in which a dummy pattern having a pattern identical to or similar to a line of a signal area is positioned between the signal area and a non-signal area, in a pad including the signal area and the non-signal area.
Abstract:
A display device includes a substrate which includes a display area and a non-display area adjacent to the display area, a first planarization layer which is at least partially disposed in the display area, a second planarization layer which is disposed in the non-display area and is spaced apart from the first planarization layer, a contact unit disposed between the first planarization layer and the second planarization layer in the non-display area, and a cathode which extends from the display area to the non-display area to be electrically connected to the contact unit. Accordingly, the first planarization layer and the second planarization layer are spaced apart from each other so that a path through which moisture permeates into the display area through the second planarization layer may be blocked.
Abstract:
A display device comprising a display panel that includes an active area, the active area including a data line positioned on a substrate in a first direction and transferring a data signal, a gate line positioned on the substrate in a second direction and transferring a gate signal, a thin film transistor connected to the gate line and the data line, and a plurality of pixels driven by the thin film transistor, a first pad coupled to a first signal line disposed in a data signal area wherein the first signal line is connected to the data line, and a first non-signal line disposed in a first non-signal area wherein the first non-signal line is disconnected from the data line, the first non-signal area being disposed outside the data signal area, a second pad coupled to a second signal line disposed in a gate signal area wherein the second signal line is connected to the gate line, and a second non-signal line disposed in a second non-signal area wherein the second non-signal line is disconnected from the gate line, the second non-signal area being disposed outside the gate signal area; and a dummy pattern disposed between the data signal area and the first non-signal area, or disposed between the gate signal area and the second non-signal area.