DISPLAY DEVICE CAPABLE OF DISCHARGING RESIDUAL CHARGES

    公开(公告)号:US20220199008A1

    公开(公告)日:2022-06-23

    申请号:US17553184

    申请日:2021-12-16

    Inventor: Jaeseung LEE

    Abstract: A display device capable of discharging residual charges includes a discharging circuitry to discharge charges remaining in a GIP driver, a Gate D-IC, a Source D-IC, a Gamma IC, etc. to a ground GND when a display panel is powered off, so that the display device protects the display panel by rapidly discharging residual charges that may accumulate on the display panel and a printed circuit board when power is off.

    DISPLAY DEVICE AND DRIVING METHOD THEREOF
    3.
    发明申请

    公开(公告)号:US20200294463A1

    公开(公告)日:2020-09-17

    申请号:US16890165

    申请日:2020-06-02

    Inventor: Jaeseung LEE

    Abstract: Provided is a display device including: a display panel; a system board configured to supply a signal and a voltage required to drive the display panel; a timing controller configured to receive the signal from the system board, generate control signals required to drive the display panel, and transmit some of the control signals to the system board; and a level shifter configured to convert voltage levels of the some signal of the timing controller into a signal voltage level suitable for the system board. The level shifter includes an output voltage control terminal configured to control the level shifter not to generate an output voltage when the system board is turned off.

    DISPLAY DEVICE AND DRIVING METHOD THEREOF
    4.
    发明申请

    公开(公告)号:US20170154600A1

    公开(公告)日:2017-06-01

    申请号:US15351637

    申请日:2016-11-15

    Inventor: Jaeseung LEE

    Abstract: Provided is a display device including: a display panel; a system board configured to supply a signal and a voltage required to drive the display panel; a timing controller configured to receive the signal from the system board, generate control signals required to drive the display panel, and transmit some of the control signals to the system board; and a level shifter configured to convert voltage levels of the some signal of the timing controller into a signal voltage level suitable for the system board. The level shifter includes an output voltage control terminal configured to control the level shifter not to generate an output voltage when the system board is turned off.

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