公开(公告)号：US20240363604A1

公开(公告)日：2024-10-31

申请号：US18432387

申请日：2024-02-05

Applicant: pSemi Corporation

Inventor： David GIULIANO

IPC: H01L25/16 ,  H01L23/48 ,  H01L23/522 ,  H01L23/64 ,  H01L27/01 ,  H01L27/06 ,  H02M3/07 ,  H05K1/02 ,  H05K1/11 ,  H10N19/00

CPC classification number: H01L25/16 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/64 ,  H01L23/642 ,  H01L27/016 ,  H01L27/0688 ,  H01L28/40 ,  H01L28/90 ,  H02M3/07 ,  H05K1/0298 ,  H05K1/115 ,  H10N19/00 ,  H01L2224/0401 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H02M3/077

Abstract: This disclosure relates to embodiments that include an apparatus that may comprise a first layer including a first plurality of active devices, a second layer including a second plurality of active devices, and/or a third layer including a plurality of passive devices and disposed between the first and the second layers. An active device of the first plurality of active devices and an active device of the second plurality of active devices may influence a state of charge of a passive device of the plurality of passive devices.

公开(公告)号：US12127346B2

公开(公告)日：2024-10-22

申请号：US17898967

申请日：2022-08-30

Applicant: Kioxia Corporation

Inventor： Kazuyuki Niitsuma

IPC: H05K1/02 ,  H05K1/18

CPC classification number: H05K1/181 ,  H05K1/0215 ,  H05K1/0298 ,  H05K2201/10159 ,  H05K2201/1034

Abstract: A substrate includes a first connector fittable to a connector of a host device. The first connector includes a plurality of connector terminals arranged in a first direction and a substrate portion including a surface S1 provided with the plurality of connector terminals and extending in the first direction. The substrate portion includes a surface S3 perpendicular to the surface S1, a first protrusion provided on the surface S3 and protruding in the first direction, a surface S4 located on an opposite side of the surface S3, and a second protrusion provided on the surface S4 and protruding in a direction opposite to the first direction.

公开(公告)号：US12127341B2

公开(公告)日：2024-10-22

申请号：US17875683

申请日：2022-07-28

Applicant: THALES

Inventor： Geoffroy Aupee ,  Pierre-Yves Michaud

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/04 ,  H05K3/10 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/0298 ,  H05K1/181 ,  H05K3/10 ,  H05K3/42 ,  H05K3/4697 ,  H05K3/0094 ,  H05K3/04 ,  H05K2201/09372

Abstract: Embodiments provide a multilayer printed circuit board intended to connect electronic components, the board comprising a stack of a plurality of conductive layers, the conductive layers comprising two surface layers and one or more internal layers, the board comprising one or more counterbored holes, each counterbored hole comprising a portion with metallization opening onto one of the two surface layers and a portion without metallization opening onto the other surface layer; the multilayer printed circuit board may advantageously comprise one or more metal pads, each metal pad being joined to one of the two surface layers so as to occult the portion without metallization of a corresponding counterbored hole.

公开(公告)号：US20240334617A1

公开(公告)日：2024-10-03

申请号：US18609546

申请日：2024-03-19

Applicant: AT&S Austria Technologie & Systemtechnik AG

Inventor： Hans PARK ,  Jeesoo MOK

IPC: H05K3/46 ,  H05K1/02 ,  H05K3/40

CPC classification number: H05K3/4673 ,  H05K1/0298 ,  H05K3/4038 ,  H05K2201/095 ,  H05K2203/0147

Abstract: A component carrier and a method of manufacturing the component carrier are presented. The component carrier includes a stack having a stack with: i) at least two electrically insulating layer structures; ii) a first electrically conductive layer structure, including a first line spacing, and at least one second electrically conductive layer structure, having a second line spacing embedded in and/or provided on one of the at least two electrically insulating layer structures, respectively; iii) at least one third electrically conductive layer structure, having a third line spacing, provided on and/or in one of the at least two electrically insulating layer structures, wherein the first line spacing and the second line spacing is larger than the third line spacing, wherein the third electrically conductive layer structure is arranged between the first electrically conductive layer structure and the second electrically conductive layer structure in the stacking direction of the stack; and iv) an electrically conductive connection that electrically connects the first electrically conductive layer structure and the second electrically conductive layer structure in the stacking direction, wherein the electrically conductive connection passes through the third electrically conductive layer structure at a connection layer structure.

公开(公告)号：US20240305184A1

公开(公告)日：2024-09-12

申请号：US18613197

申请日：2024-03-22

Applicant: SCHNEIDER ELECTRIC IT CORPORATION

Inventor： Indra Prakash ,  Roger Franchino ,  Damir Klikic

IPC: H02M1/08 ,  H02M7/00 ,  H02M7/537 ,  H05K1/02 ,  H05K1/18 ,  H05K3/32

CPC classification number: H02M1/08 ,  H02M7/003 ,  H02M7/537 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/32 ,  H05K2201/09227 ,  H05K2201/10015 ,  H05K2201/10166 ,  H05K2201/10522

Abstract: According to one aspect, embodiments of the invention provide an electrical-converter system comprising a printed circuit board including at least a first layer and a second layer, a switching node disposed on the second layer, a first transistor, a second transistor, a third transistor, and a fourth transistor disposed on the first layer, a first conduction path from a source of the first transistor, through the switching node, to a drain of the fourth transistor, the first conduction path having a first length, and a second conduction path from the source of the first transistor, through the switching node, to a drain of the second transistor, the second conduction path having a second length, wherein the first length of the first conduction path is greater than the second length of the second conduction path.

公开(公告)号：US12086329B1

公开(公告)日：2024-09-10

申请号：US18455748

申请日：2023-08-25

Applicant: SUNREX TECHNOLOGY CORP.

Inventor： Shih-Pin Lin

IPC: G09G5/00 ,  F21V33/00 ,  G06F3/02 ,  H05K1/02 ,  H05K1/11 ,  F21Y115/10

CPC classification number: G06F3/0202 ,  F21V33/0052 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/0298 ,  H05K1/115 ,  F21Y2115/10 ,  H05K2201/10106

Abstract: A light emitting keyboard includes a support plate having first and second plate portions, a membrane circuit board, a flexible circuit board electrically connected to the membrane circuit board, a backlight module disposed under the first plate portion, and a plurality of key modules disposed on top of the membrane circuit board. The membrane circuit board includes a lower circuit membrane disposed on top of the first plate portion, a partition plate having first and second partition portions, and an upper circuit membrane having first and second upper circuit sheet portions respectively disposed on top of the first and second partition portions. The flexible circuit board includes a lower circuit membrane disposed between the second plate portion and the second partition portion, and a plurality of light-emitting elements disposed on the lower circuit membrane of the flexible circuit board.

公开(公告)号：US12075569B2

公开(公告)日：2024-08-27

申请号：US17583215

申请日：2022-01-25

Applicant: FUJIFILM Business Innovation Corp.

Inventor： Yasuo Matsumura ,  Sumiaki Yamasaki ,  Tsuyoshi Murakami ,  Kana Yoshida ,  Shuji Sato

IPC: H05K3/12 ,  H05K1/02 ,  H05K1/18 ,  H05K3/02

CPC classification number: H05K3/1266 ,  H05K1/0298 ,  H05K1/188 ,  H05K3/025

Abstract: A method for producing a circuit board includes providing a substrate on which a toner image formed of a thermoplastic toner has been formed and forming a conductive foil layer having a thickness of 0.1 μm to 2 μm on the toner image that has been formed on the substrate and then applying heat to the toner image and the conductive foil layer to form a wire constituted by conductive foil.

公开(公告)号：US12068210B2

公开(公告)日：2024-08-20

申请号：US17376534

申请日：2021-07-15

Applicant: TOPPAN PRINTING CO., LTD.

Inventor： Yuki Umemura ,  Akane Kobayashi

IPC: H01L23/15 ,  H05K1/02 ,  H05K1/03

CPC classification number: H01L23/15 ,  H05K1/0298 ,  H05K1/0306

Abstract: A package substrate that prevents breakage of a core substrate is provided. A package substrate includes a core substrate made of a brittle material, at least one insulating layer formed on one surface or both surfaces of the core substrate, and one or more wiring layers formed on the insulating layer and/or in the insulating layer, the core substrate being exposed from an outer peripheral portion of the insulating layer, and the insulating layer being chamfered.

公开(公告)号：US12046892B2

公开(公告)日：2024-07-23

申请号：US17619981

申请日：2020-06-12

Applicant: Schneider Electric Industries SAS

Inventor： Thomas Canet ,  Christian Kneifel ,  May Zhang ,  Linda Hao

IPC: H02H3/10 ,  H02H3/08 ,  H05K1/02

CPC classification number: H02H3/10 ,  H02H3/085 ,  H05K1/0298

Abstract: An electronic installation device for controlling a load in an electrical circuit, which comprises a single or multi-layer printed circuit board arrangement with electrical components and conductor tracks and which comprises a load circuit and a control circuit. According to the invention, in order to provide an electronic installation device with protective devices against short-circuit and against overload and which are specific to devices, the load circuit and the control circuit are at least functionally coupled to one another, and the electronic installation device comprises a first overcurrent protection device for protection against short-circuit currents and a second overcurrent protection device for protection against overload currents.

公开(公告)号：US12028982B2

公开(公告)日：2024-07-02

申请号：US18480303

申请日：2023-10-03

Applicant: Apple Inc.

Inventor： Bilal Mohamed Ibrahim Kani ,  Benjamin J. Grena ,  Kyusang Kim ,  David M. Kindlon ,  Pierpaolo Lupo ,  Kishore N. Renjan ,  Manoj Vadeentavida

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K1/186 ,  H05K1/0298 ,  H05K1/189 ,  H05K1/0274 ,  H05K2201/10083 ,  H05K2201/10106 ,  H05K2201/10121 ,  H05K2201/10151 ,  H05K2201/10159

Abstract: Fabric may include one or more conductive strands. An insertion tool may insert an electrical component into the fabric during formation of the fabric. The electrical component may include an electrical device mounted to a substrate and encapsulated by a protective structure. An interconnect structure such as a metal via or printed circuit layers may pass through an opening in the protective structure and may be used to couple a conductive strand to a contact pad on the substrate. The protective structure may be transparent or may include an opening so that light can be detected by or emitted from an optical device on the substrate. The protective structure may be formed using a molding tool that provides the protective structure with grooves or may be molded around a hollow conductive structure to create grooves. An electrical component mounted to the fabric may be embedded within printed circuit layers.