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Patent Agency Ranking
公开(公告)号：US20240221593A1
公开(公告)日：2024-07-04
申请号：US18226546
申请日：2023-07-26
Applicant: LG Display Co., Ltd.
Inventor： Sang Woo Park , Tae Gung Kim
CPC classification number: G09G3/2096 , G09G3/32 , G09G2300/026 , G09G2300/0452 , G09G2310/08 , G09G2320/0233 , G09G2320/0242 , G09G2320/0626 , G09G2320/0673 , G09G2360/16
Abstract: A tiling display apparatus comprises: a first display group including first timing controllers to receive a first input data enable signal from a first system chip, the first input data enable signal having a first delay; and a second display group including second timing controllers to receive a second input data enable signal from a second system chip, the second input data enable signal having a second delay, wherein the first timing controllers of the first display group and the second timing controllers of the second display group share input delay information about the first delay of the first input data enable signal and input delay information about the second delay of the second input data enable signal with each other, and each of the first timing controllers and the second timing controllers generate a common output data enable signal based on the shared input delay information.
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公开(公告)号：US12008945B1
公开(公告)日：2024-06-11
申请号：US18226546
申请日：2023-07-26
Applicant: LG Display Co., Ltd.
Inventor： Sang Woo Park , Tae Gung Kim
CPC classification number: G09G3/2096 , G09G3/32 , G09G2300/026 , G09G2300/0452 , G09G2310/08 , G09G2320/0233 , G09G2320/0242 , G09G2320/0626 , G09G2320/0673 , G09G2360/16
Abstract: A tiling display apparatus comprises: a first display group including first timing controllers to receive a first input data enable signal from a first system chip, the first input data enable signal having a first delay; and a second display group including second timing controllers to receive a second input data enable signal from a second system chip, the second input data enable signal having a second delay, wherein the first timing controllers of the first display group and the second timing controllers of the second display group share input delay information about the first delay of the first input data enable signal and input delay information about the second delay of the second input data enable signal with each other, and each of the first timing controllers and the second timing controllers generate a common output data enable signal based on the shared input delay information.
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公开(公告)号：US20230229377A1
公开(公告)日：2023-07-20
申请号：US17979607
申请日：2022-11-02
Applicant: LG Display Co., Ltd.
Inventor： Sang Woo Park , Tae Gung Kim
CPC classification number: G06F3/1446 , G06F11/162 , G09G3/006 , G06F2201/86 , G09G2300/026 , G09G2330/10 , G09G2330/12 , G09G2360/04
Abstract: A tiling display apparatus includes a plurality of display modules connected to one another through a first interface circuit and a second interface circuit and a set board receiving a defect occurrence and position signal, generated in a broken-down module of the plurality of display modules, from the broken module through the first interface circuit in a first period, generating a defect recognition completion signal in a second period succeeding the first period, and transferring the defect recognition completion signal to the broken-down module through the second interface circuit in the second period.
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公开(公告)号：US20240248668A1
公开(公告)日：2024-07-25
申请号：US18628218
申请日：2024-04-05
Applicant: LG Display Co., Ltd.
Inventor： Sang Woo Park , Tae Gung Kim
CPC classification number: G06F3/1446 , G06F11/162 , G09G3/006 , G06F2201/86 , G09G2300/026 , G09G2330/10 , G09G2330/12 , G09G2360/04
Abstract: A tiling display apparatus includes a plurality of display modules connected to one another through a first interface circuit and a second interface circuit and a set board receiving a defect occurrence and position signal, generated in a broken-down module of the plurality of display modules, from the broken module through the first interface circuit in a first period, generating a defect recognition completion signal in a second period succeeding the first period, and transferring the defect recognition completion signal to the broken-down module through the second interface circuit in the second period.
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公开(公告)号：US11977807B2
公开(公告)日：2024-05-07
申请号：US17979607
申请日：2022-11-02
Applicant: LG Display Co., Ltd.
Inventor： Sang Woo Park , Tae Gung Kim
CPC classification number: G06F3/1446 , G06F11/162 , G09G3/006 , G06F2201/86 , G09G2300/026 , G09G2330/10 , G09G2330/12 , G09G2360/04
Abstract: A tiling display apparatus includes a plurality of display modules connected to one another through a first interface circuit and a second interface circuit and a set board receiving a defect occurrence and position signal, generated in a broken-down module of the plurality of display modules, from the broken module through the first interface circuit in a first period, generating a defect recognition completion signal in a second period succeeding the first period, and transferring the defect recognition completion signal to the broken-down module through the second interface circuit in the second period.
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