公开(公告)号：US20030197182A1

公开(公告)日：2003-10-23

申请号：US10385501

申请日：2003-03-12

Applicant: LG. PHILIPS LCD CO., LTD.

Inventor： Woong Kwon Kim ,  Heung Lyul Cho

IPC: H01L029/04

CPC classification number: H01L27/1222 ,  G02F2001/136236 ,  G03F1/50 ,  G03F1/70 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A thin film transistor array substrate including a gate pattern having a gate electrode, a gate line connected to the gate electrode, and a gate pad connected to the gate line, a source/drain pattern having a source electrode, a drain electrode, a data line connected to the source electrode, and a data pad connected to the data line, a gate insulating pattern formed along a matrix pattern including the gate pattern and the source/drain pattern except for a pixel area, a semiconductor pattern formed on the gate insulating pattern having a same pattern as the gate insulating pattern and partially removed at a thin film transistor area and the gate line area, and a transparent electrode pattern having a pixel electrode formed at the pixel area and connected to the drain electrode, a gate pad protective electrode formed on the gate-pad, and a data pad protective electrode formed on the data pad.

Abstract translation: 一种薄膜晶体管阵列基板，包括具有栅电极，连接到栅电极的栅极线和连接到栅极线的栅极焊盘的栅极图案，具有源电极，漏极，数据的源/漏图案 连接到源极的数据焊盘和连接到数据线的数据焊盘，沿着包括栅极图案和除了像素区域之外的源极/漏极图案的矩阵图案形成的栅极绝缘图案，形成在栅极绝缘上的半导体图案 图案具有与栅极绝缘图案相同的图案并且在薄膜晶体管区域和栅极线区域处部分地去除，以及透明电极图案，其具有形成在像素区域处并连接到漏电极的像素电极，栅极焊盘保护 形成在栅极焊盘上的电极，以及形成在数据焊盘上的数据焊盘保护电极。