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公开(公告)号：US08400459B2
公开(公告)日：2013-03-19
申请号：US11746446
申请日：2007-05-09
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
摘要翻译： 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其从所述多个像素命令线程中选择像素命令线程，以及从所述多个顶点命令线程中选择顶点命令线程。 仲裁器还从先前选择的像素命令线程和顶点命令线程中选择命令线程，该命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
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公开(公告)号：US08760454B2
公开(公告)日：2014-06-24
申请号：US13109738
申请日：2011-05-17
IPC分类号： G06F15/00
CPC分类号： G06T1/20 , G06T15/005 , G06T15/80
摘要： A graphics processing architecture in one example performs vertex manipulation operations and pixel manipulation operations by transmitting vertex data to a general purpose register block, and performing vertex operations on the vertex data b a processor unless the general purpose register block does not have enough available space therein to store incoming vertex data; and continues pixel calculation operations that are to be or are currently being performed the processor based on instructions maintained in an instruction store until enough registers within the general purpose register block become available.
摘要翻译： 一个示例中的图形处理架构通过将顶点数据发送到通用寄存器块来执行顶点操作操作和像素操作操作，并且对顶点数据ba处理器执行顶点操作，除非通用寄存器块在其中没有足够的可用空间 存储传入的顶点数据; 并且继续基于在指令存储器中保持的指令来处理或正在执行处理器的像素计算操作，直到通用寄存器块中的足够的寄存器变得可用为止。
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公开(公告)号：US20120019543A1
公开(公告)日：2012-01-26
申请号：US13253473
申请日：2011-10-05
IPC分类号： G06T1/00
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the plurality of pixel or vertex command threads based on relative priorities of the plurality of pixel command threads and the plurality of vertex command threads. The selected command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
摘要翻译： 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其基于所述多个像素命令线程和所述多个顶点命令线程的相对优先级从所述多个像素或顶点命令线程中选择命令线程。 所选择的命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
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公开(公告)号：US07746348B2
公开(公告)日：2010-06-29
申请号：US11746427
申请日：2007-05-09
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises a command processing engine capable of processing pixel command threads and vertex command threads. The command processing engine is coupled to both a renderer and a scan converter. Upon completing processing of a command thread, which may comprise a pixel command thread or a vertex command thread, the command engine provides the command thread to either the renderer or the scan converter.
摘要翻译： 图形处理系统包括能够处理像素命令线程和顶点命令线程的命令处理引擎。 命令处理引擎与渲染器和扫描转换器耦合。 在完成可以包括像素命令线程或顶点命令线程的命令线程的处理之后，命令引擎将命令线程提供给渲染器或扫描转换器。
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公开(公告)号：US07742053B2
公开(公告)日：2010-06-22
申请号：US11746453
申请日：2007-05-09
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the plurality of pixel or vertex command threads based on relative priorities of the plurality of pixel command threads and the plurality of vertex command threads. The selected command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
摘要翻译： 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其基于所述多个像素命令线程和所述多个顶点命令线程的相对优先级从所述多个像素或顶点命令线程中选择命令线程。 所选择的命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
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6.发明授权Method and apparatus for fragment scriptor for use in over-sampling anti-aliasing 有权用于片段脚本的方法和装置，用于过采样抗锯齿公开(公告)号：US07012613B1
公开(公告)日：2006-03-14
申请号：US09563483
申请日：2000-05-02
IPC分类号： G09G5/00
CPC分类号： G06T15/005
摘要： A method and apparatus for producing a fragment descriptor for use in oversampling anti-aliasing includes processing that begins by generating a single representative color value for a plurality of subpixels of a pixel. The processing then continues by generating a single representative Z value for the pixel. The processing continues by generating masking information for the pixel, wherein the masking information indicates, for a given object-element being rendered, coverage of the pixel by the object-element. The processing continues by packing the single representative color value, the single representative Z value, and the masking information into a fragment descriptor. The processing continues by transporting the fragment descriptor to a custom memory. When the custom memory receives the fragment descriptor it unpacks it to recapture the single representative color value, the single representative Z value and the masking information. The custom memory then duplicates the single representative color value for each subpixel of the pixel that is covered by the object-element based on the masking information. The custom memory then determines slope information for the pixel such that Z values may be determined for each subpixel. In addition, the custom memory generates color values and the Z values for each subpixel.
摘要翻译： 用于产生用于过采样抗锯齿的片段描述符的方法和装置包括通过为像素的多个子像素生成单个代表性色彩值开始的处理。 然后通过为像素生成单个代表性的Z值来继续处理。 该处理继续通过生成针对像素的屏蔽信息，其中对于被渲染的给定对象元素，掩蔽信息表示由对象元素对像素的覆盖。 通过将单个代表性颜色值，单个代表性Z值和掩蔽信息打包成片段描述符来继续处理。 通过将片段描述符传送到自定义内存来继续处理。 当定制存储器接收到片段描述符时，它将其解包以重新获取单个代表颜色值，单个代表Z值和掩蔽信息。 然后，定制存储器基于掩蔽信息复制由对象元素覆盖的像素的每个子像素的单个代表颜色值。 然后，定制存储器确定像素的斜率信息，以便可以为每个子像素确定Z值。 此外，自定义内存会为每个子像素生成颜色值和Z值。
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7.发明授权Method and apparatus for graphics processing using parallel graphics processors 有权使用并行图形处理器的图形处理方法和装置公开(公告)号：US06473086B1
公开(公告)日：2002-10-29
申请号：US09457649
申请日：1999-12-09
IPC分类号： G06F1580
CPC分类号： G06T15/005
摘要： A method and apparatus for graphics processing that utilizes multiple graphics processors in parallel is presented. A primary graphics processor is operably coupled to a primary memory that includes a primary color buffer and a primary Z buffer. The primary processor processes a first portion of the image data for a frame, where processing the first portion stores color data in the primary color buffer and Z data in the primary Z buffer. A secondary processor is operably coupled to a secondary memory that includes a secondary color buffer and a secondary Z buffer. The secondary processor processes a second portion of the image data for the frame. The processing of the second portion of the image data results in color data being stored in the secondary color buffer and Z data being stored in the secondary Z buffer. The display signal that results in the image data for the frame being displayed is generated by a display driver included in the primary processor. In one embodiment, the display driver retrieves all of the color data used to generate the display signal from the primary color buffer. As such, the secondary processor transfers the color data for the second portion of the frame from the secondary color buffer to the primary color buffer to facilitate generation of the display signal. This data transference preferably occurs utilizing direct memory access (DMA) transfers that may be initiated during the vertical blanking interval portion of the display signal.
摘要翻译： 介绍了并行利用多个图形处理器的图形处理方法和装置。 主图形处理器可操作地耦合到包括原色缓冲器和主Z缓冲器的主存储器。 主处理器处理帧的图像数据的第一部分，其中处理第一部分存储主色缓冲器中的颜色数据和主Z缓冲器中的Z数据。 辅助处理器可操作地耦合到辅助存储器，其包括辅助色彩缓冲器和辅助Z缓冲器。 二级处理器处理帧的图像数据的第二部分。 图像数据的第二部分的处理导致存储在辅色缓冲器中的颜色数据和存储在次Z缓冲器中的Z数据。 导致正在显示的帧的图像数据的显示信号由主处理器中包括的显示驱动器生成。 在一个实施例中，显示驱动器从原色缓冲器检索用于生成显示信号的所有颜色数据。 这样，辅助处理器将帧的第二部分的颜色数据从次色缓冲器传送到主色缓冲器以便于显示信号的产生。 该数据传输优选地利用可以在显示信号的垂直消隐间隔部分期间启动的直接存储器访问（DMA）传输。
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公开(公告)号：US07735093B2
公开(公告)日：2010-06-08
申请号：US10791519
申请日：2004-03-02
IPC分类号： G06F9/44 , G06F13/00 , G06F15/173
摘要： A method and apparatus includes a real time event engine that monitors event signals. A real time event detector within the real time event engine detects when the real time event occurs. Thereupon, real time event commands within a real time event command buffer are fetched and consumed by the command processor in response to the occurrence of the real time event. The real time event detector contains a plurality of control registers, which contain an event selector register, a real time command buffer point register, and a real time command buffer length register. A driver may program the registers, whereupon a singe real time event detector may be used in conjunction with a plurality of real time event command buffers.
摘要翻译： 一种方法和装置包括监视事件信号的实时事件引擎。 实时事件引擎中的实时事件检测器检测何时发生实时事件。 因此，响应于实时事件的发生，由命令处理器获取并消耗实时事件命令缓冲器内的实时事件命令。 实时事件检测器包含多个控制寄存器，其包含事件选择器寄存器，实时命令缓冲器点寄存器和实时命令缓冲器长度寄存器。 驱动器可以对寄存器进行编程，因此可以结合多个实时事件命令缓冲器使用单个实时事件检测器。
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公开(公告)号：US06483505B1
公开(公告)日：2002-11-19
申请号：US09527752
申请日：2000-03-17
IPC分类号： G06T1500
CPC分类号： G06T15/005
摘要： A method and apparatus for multipass pixel processing is presented. A command stream that includes a plurality of drawing commands is received where multipass drawing commands included in the stream include a number of sets of state information and one or more graphics primitives. For a multipass pixel processing operation, the graphics pipeline that performs the pixel processing is first configured using a first set of state information included in the sets of state information for the multipass operation. Once the graphics pipeline has been configured, at least a portion of the processing to be performed for the drawing command is performed using the graphics pipeline as configured by this first set of state information. The resultant data produced through this processing is stored as intermediate data. This may be referred to as the first pass in the multipass operation. The graphics pipeline is then reconfigured using a subsequent set of state information corresponding to the multipass drawing command. Once the graphics pipeline has been reconfigured, the second pass takes place. The second pass includes processing the portion of the graphics data processed during the first pass using the graphics pipeline as configured by the subsequent set of state information. Such processing includes utilization of the intermediate data such that the results of the first pass are included in the processing operations of the second pass.
摘要翻译： 提出了一种用于多通道像素处理的方法和装置。 接收包括多个绘图命令的命令流，其中包括在流中的多次绘图命令包括许多组状态信息和一个或多个图形基元。 对于多通道像素处理操作，首先使用包括在用于多通道操作的状态信息集合中的第一组状态信息来配置执行像素处理的图形流水线。 一旦图形管线已被配置，使用由该第一组状态信息配置的图形流水线执行要对绘制命令执行的处理的至少一部分。 通过该处理产生的结果数据被存储为中间数据。 这可以被称为多通道操作中的第一遍。 然后使用与多次绘图命令相对应的后续一组状态信息重新配置图形管线。 一旦重新配置了图形管道，就进行第二次通过。 第二遍包括使用由随后的一组状态信息配置的图形管线来处理在第一遍期间处理的图形数据的部分。 这种处理包括使用中间数据，使得第一遍的结果被包括在第二遍的处理操作中。
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公开(公告)号：US08860721B2
公开(公告)日：2014-10-14
申请号：US11277641
申请日：2006-03-28
IPC分类号： G06T15/40
CPC分类号： G06T15/405
摘要： An apparatus and method for processing pixel depth information eliminates stalling of data in a pixel pipeline, by performing late Z processing for one or more pixels currently in the pixel pipeline and early Z processing for one or more pixels entering the pixel pipeline. The apparatus and method also includes determining whether the late Z processing for the one or more pixels currently in the pixel pipeline has been completed. The apparatus and method also includes solely performing early Z processing for subsequent pixels entering the pixel pipeline responsive to determining that late Z processing for the one or more pixels currently in the pixel pipeline has been completed. The methods and apparatus, facilitates concurrent processing of early and late Z data to avoid flushing portions of the pixel pipeline.
摘要翻译： 用于处理像素深度信息的装置和方法通过对当前在像素流水线中的一个或多个像素执行后期Z处理以及进入像素流水线的一个或多个像素的早期Z处理来消除像素流水线中的数据的停止。 该装置和方法还包括确定当前在像素管线中的一个或多个像素的延迟Z处理是否已经完成。 该装置和方法还包括单独执行对进入像素流水线的后续像素的早期Z处理，以响应于确定当前在像素管线中的一个或多个像素的后期Z处理已经完成。 该方法和装置有助于早期和晚期Z数据的并发处理，以避免冲洗像素管道的部分。
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