-
1.发明授权Program flow control for multiple divergent SIMD threads using a minimum resume counter 有权使用最小恢复计数器对多个发散SIMD线程进行程序流控制公开(公告)号：US08832417B2
公开(公告)日：2014-09-09
申请号：US13227274
申请日：2011-09-07
IPC分类号： G06F9/38
CPC分类号： G06F9/3887 , G06F9/322 , G06F9/3851
摘要： This disclosure describes techniques for handling divergent thread conditions in a multi-threaded processing system. In some examples, a control flow unit may obtain a control flow instruction identified by a program counter value stored in a program counter register. The control flow instruction may include a target value indicative of a target program counter value for the control flow instruction. The control flow unit may select one of the target program counter value and a minimum resume counter value as a value to load into the program counter register. The minimum resume counter value may be indicative of a smallest resume counter value from a set of one or more resume counter values associated with one or more inactive threads. Each of the one or more resume counter values may be indicative of a program counter value at which a respective inactive thread should be activated.
摘要翻译： 本公开描述了用于处理多线程处理系统中的发散线程状况的技术。 在一些示例中，控制流程单元可以获得由存储在程序计数器寄存器中的程序计数器值所标识的控制流程指令。 控制流程指令可以包括指示控制流程指令的目标程序计数器值的目标值。 控制流程单元可以选择目标程序计数器值和最小恢复计数器值之一作为加载到程序计数器寄存器中的值。 最小恢复计数器值可以指示与一个或多个非活动线程相关联的一个或多个恢复计数器值的集合中的最小恢复计数器值。 一个或多个恢复计数器值中的每一个可以指示应该激活相应的非活动线程的程序计数器值。
-
2.发明授权Video instruction processing of desired bytes in multi-byte buffers by shifting to matching byte location 有权通过转移到匹配的字节位置来处理多字节缓冲器中所需字节的视频指令公开(公告)号：US08473721B2
公开(公告)日：2013-06-25
申请号：US12762020
申请日：2010-04-16
申请人： Michael J. Mantor , Jeffrey T. Brady , Christopher L. Spencer , Daniel W. Wong , Andrew E. Gruber
发明人： Michael J. Mantor , Jeffrey T. Brady , Christopher L. Spencer , Daniel W. Wong , Andrew E. Gruber
IPC分类号： G06F9/30
CPC分类号： G06T1/00
摘要： Disclosed herein is a processing unit configured to process video data, and applications thereof. In an embodiment, the processing unit includes a buffer and an execution unit. The buffer is configured to store a data word, wherein the data word comprises a plurality of bytes of video data. The execution unit is configured to execute a single instruction to (i) shift bytes of video data contained in the data word to align a desired byte of video data and (ii) process the desired byte of the video data to provide processed video data.
摘要翻译： 这里公开了一种处理单元，其被配置为处理视频数据及其应用。 在一个实施例中，处理单元包括缓冲器和执行单元。 缓冲器被配置为存储数据字，其中数据字包括多个字节的视频数据。 执行单元被配置为执行单个指令，以（i）移动包含在数据字中的视频数据的字节以对准视频数据的所需字节，并且（ii）处理视频数据的期望字节以提供经处理的视频数据。
-
公开(公告)号：US08400459B2
公开(公告)日：2013-03-19
申请号：US11746446
申请日：2007-05-09
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
摘要翻译： 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其从所述多个像素命令线程中选择像素命令线程，以及从所述多个顶点命令线程中选择顶点命令线程。 仲裁器还从先前选择的像素命令线程和顶点命令线程中选择命令线程，该命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
-
4.发明申请TECHNIQUES FOR HANDLING DIVERGENT THREADS IN A MULTI-THREADED PROCESSING SYSTEM 有权在多螺纹加工系统中处理多条螺纹的技术公开(公告)号：US20130061027A1
公开(公告)日：2013-03-07
申请号：US13227274
申请日：2011-09-07
CPC分类号： G06F9/3887 , G06F9/322 , G06F9/3851
摘要： This disclosure describes techniques for handling divergent thread conditions in a multi-threaded processing system. In some examples, a control flow unit may obtain a control flow instruction identified by a program counter value stored in a program counter register. The control flow instruction may include a target value indicative of a target program counter value for the control flow instruction. The control flow unit may select one of the target program counter value and a minimum resume counter value as a value to load into the program counter register. The minimum resume counter value may be indicative of a smallest resume counter value from a set of one or more resume counter values associated with one or more inactive threads. Each of the one or more resume counter values may be indicative of a program counter value at which a respective inactive thread should be activated.
摘要翻译： 本公开描述了用于处理多线程处理系统中的发散线程状况的技术。 在一些示例中，控制流程单元可以获得由存储在程序计数器寄存器中的程序计数器值所标识的控制流程指令。 控制流程指令可以包括指示控制流程指令的目标程序计数器值的目标值。 控制流程单元可以选择目标程序计数器值和最小恢复计数器值之一作为加载到程序计数器寄存器中的值。 最小恢复计数器值可以指示与一个或多个非活动线程相关联的一个或多个恢复计数器值的集合中的最小恢复计数器值。 一个或多个恢复计数器值中的每一个可以指示应该激活相应的非活动线程的程序计数器值。
-
公开(公告)号：US20120050313A1
公开(公告)日：2012-03-01
申请号：US12861865
申请日：2010-08-24
申请人： Andrew E. Gruber
发明人： Andrew E. Gruber
IPC分类号： G09G5/00
CPC分类号： G06T11/00 , G06T15/503 , G09G5/14 , G09G2340/12
摘要： This disclosure describes techniques for rendering pixels on a display. A processing unit may receive pixel values for surface pixels of each surface of a plurality of surface. The processing unit may also receive an order of the plurality of surfaces. Based on at least the location and order of the plurality surfaces, the processing unit may blend pixel values for co-located surface pixels. The processing unit may also accumulate opaqueness values for co-located surface pixels and/or opaqueness values for surfaces with co-located surface pixels.
摘要翻译： 本公开描述了用于在显示器上渲染像素的技术。 处理单元可以接收多个表面的每个表面的表面像素的像素值。 处理单元还可以接收多个表面的顺序。 至少基于多个表面的位置和顺序，处理单元可以将共同定位的表面像素的像素值混合。 处理单元还可以为具有共位表面像素的表面积累用于共位表面像素的不透明值和/或不透明度值。
-
6.发明授权Apparatus for providing data to a plurality of graphics processors and method thereof 有权用于向多个图形处理器提供数据的装置及其方法公开(公告)号：US06633296B1
公开(公告)日：2003-10-14
申请号：US09579432
申请日：2000-05-26
申请人： Indra Laksono , Milivoje Aleksic , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Brian Lee
发明人： Indra Laksono , Milivoje Aleksic , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Brian Lee
IPC分类号： G06F1516
CPC分类号： G06F3/14 , G09G5/363 , G09G2352/00 , G09G2360/06
摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.
摘要翻译： 在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。 系统总线连接到连接到第二和第三AGP总线的数据桥。 每个AGP总线都连接到图形处理器。 桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。 在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。 本发明的另一方面允许在各种AGP协议部分之间进行转换
-
7.发明授权公开(公告)号：US06486884B1
公开(公告)日：2002-11-26
申请号：US09314561
申请日：1999-05-19
IPC分类号： G06F1206
CPC分类号： H04N19/423
摘要： A method and apparatus for storing sequential data words associated with a block of data in a non-linear manner within the data block is taught such that any row or column associated with the data block may be accessed using a burst access. A row, or column of data accessed by a burst frees up instruction bandwidth of a video controller. In particular, it is assured that each row and column of data associated with the data block has at least one sequential pair of data words associated with it. By assuring at least one sequential pair of data words, it is possible to issue a burst request for a minimum of two words of data with each row access, or column access of the video controller.
摘要翻译： 教导以数据块中的非线性方式存储与数据块相关联的顺序数据字的方法和装置，使得可以使用突发存取来访问与数据块相关联的任何行或列。 由突发访问的一行或一列数据释放视频控制器的指令带宽。 特别地，确保与数据块相关联的每一行和数据列具有与其相关联的至少一个连续数据字对。 通过确保至少一个顺序的数据字对，可以对视频控制器的每一行访问或列访问发出至少两个数据字的突发请求。
-
公开(公告)号：US07746348B2
公开(公告)日：2010-06-29
申请号：US11746427
申请日：2007-05-09
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises a command processing engine capable of processing pixel command threads and vertex command threads. The command processing engine is coupled to both a renderer and a scan converter. Upon completing processing of a command thread, which may comprise a pixel command thread or a vertex command thread, the command engine provides the command thread to either the renderer or the scan converter.
摘要翻译： 图形处理系统包括能够处理像素命令线程和顶点命令线程的命令处理引擎。 命令处理引擎与渲染器和扫描转换器耦合。 在完成可以包括像素命令线程或顶点命令线程的命令线程的处理之后，命令引擎将命令线程提供给渲染器或扫描转换器。
-
公开(公告)号：US07742053B2
公开(公告)日：2010-06-22
申请号：US11746453
申请日：2007-05-09
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the plurality of pixel or vertex command threads based on relative priorities of the plurality of pixel command threads and the plurality of vertex command threads. The selected command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
摘要翻译： 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其基于所述多个像素命令线程和所述多个顶点命令线程的相对优先级从所述多个像素或顶点命令线程中选择命令线程。 所选择的命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
-
公开(公告)号：US07735093B2
公开(公告)日：2010-06-08
申请号：US10791519
申请日：2004-03-02
IPC分类号： G06F9/44 , G06F13/00 , G06F15/173
摘要： A method and apparatus includes a real time event engine that monitors event signals. A real time event detector within the real time event engine detects when the real time event occurs. Thereupon, real time event commands within a real time event command buffer are fetched and consumed by the command processor in response to the occurrence of the real time event. The real time event detector contains a plurality of control registers, which contain an event selector register, a real time command buffer point register, and a real time command buffer length register. A driver may program the registers, whereupon a singe real time event detector may be used in conjunction with a plurality of real time event command buffers.
摘要翻译： 一种方法和装置包括监视事件信号的实时事件引擎。 实时事件引擎中的实时事件检测器检测何时发生实时事件。 因此，响应于实时事件的发生，由命令处理器获取并消耗实时事件命令缓冲器内的实时事件命令。 实时事件检测器包含多个控制寄存器，其包含事件选择器寄存器，实时命令缓冲器点寄存器和实时命令缓冲器长度寄存器。 驱动器可以对寄存器进行编程，因此可以结合多个实时事件命令缓冲器使用单个实时事件检测器。
-
-
-
-
-
-
-
-
-
搜索结果
32 条记录 (耗时 0.026 秒)