公开(公告)号：US07920409B1

公开(公告)日：2011-04-05

申请号：US11758568

申请日：2007-06-05

申请人： Lawrence T. Clark ,  Sayeed Ahmed Badrudduza

发明人： Lawrence T. Clark ,  Sayeed Ahmed Badrudduza

IPC分类号： G11C11/00

CPC分类号： G11C11/412

摘要： A Static Random Access Memory (SRAM) cell having high stability and low leakage is provided. The SRAM cell includes a pair of cross-coupled inverters providing differential storage of a data bit. Power to the SRAM cell is provided by a read word line (RWL) signal, which is also referred to herein as a read control signal. During read operations, the RWL signal is pulled to a voltage level that forces the SRAM cell to a full-voltage state. During standby, the RWL signal is pulled to a voltage level that forces the SRAM cell to a voltage collapsed state in order to reduce leakage current, or leakage power, of the SRAM cell. A read-transistor providing access to the bit stored by the SRAM cell is coupled to the SRAM cell via a gate of the read transistor, thereby decoupling the stability of the SRAM cell from the read operation.

摘要翻译： 提供了具有高稳定性和低泄漏的静态随机存取存储器（SRAM）单元。 SRAM单元包括一对交叉耦合的反相器，提供数据位的差分存储。 SRAM单元的电源由读取字线（RWL）信号提供，读取字线（RWL）信号在本文中也称为读取控制信号。 在读取操作期间，RWL信号被拉到一个电压电平，迫使SRAM单元达到全电压状态。 在待机期间，RWL信号被拉至电压电平，迫使SRAM单元处于电压合拢状态，以便降低SRAM单元的漏电流或泄漏功率。 提供对SRAM单元存储的位的访问的读晶体管经由读晶体管的栅极耦合到SRAM单元，从而将SRAM单元的稳定性与读操作分离。

公开(公告)号：US20150229307A1

公开(公告)日：2015-08-13

申请号：US14180322

申请日：2014-02-13

申请人： Sayeed Ahmed Badrudduza ,  Alexander Bernhard Hoefler

发明人： Sayeed Ahmed Badrudduza ,  Alexander Bernhard Hoefler

IPC分类号： H03K19/0175 ,  H03K3/037 ,  H03K19/0948

CPC分类号： H03K19/017509 ,  H03K3/35613 ,  H03K3/356165 ,  H03K19/0948

摘要： A level shifter includes a first branch and a second branch. A trigger of the first branch is coupled to a low voltage input, an inverted high voltage output and a ground. A latch of the first branch is coupled to the inverted high voltage output and a high voltage output. A power gate of the first branch is coupled to an inverted low voltage input, the latch of the first branch and a high voltage supply. A trigger of the second branch is coupled to the inverted low voltage input, the high voltage output and the ground. A latch of the second branch is coupled to the high voltage output and the inverted high voltage output. A power gate of the second branch is coupled to the low voltage input, the latch of the second branch and the high voltage supply.

摘要翻译： 电平移位器包括第一分支和第二分支。 第一分支的触发器耦合到低电压输入，反相高压输出和地。 第一分支的锁存器耦合到反相高压输出和高电压输出。 第一分支的功率门耦合到反相低电压输入，第一分支的锁存器和高电压电源。 第二分支的触发器耦合到反相低压输入，高压输出和地。 第二分支的锁存器耦合到高压输出和反相高压输出。 第二分支的电源门耦合到低电压输入，第二分支的锁存器和高电压电源。

公开(公告)号：US09136845B2

公开(公告)日：2015-09-15

申请号：US14180322

申请日：2014-02-13

申请人： Sayeed Ahmed Badrudduza ,  Alexander Bernhard Hoefler

发明人： Sayeed Ahmed Badrudduza ,  Alexander Bernhard Hoefler

IPC分类号： H03L5/00 ,  H03K19/0175 ,  H03K19/0948 ,  H03K3/037

CPC分类号： H03K19/017509 ,  H03K3/35613 ,  H03K3/356165 ,  H03K19/0948

摘要： A level shifter includes a first branch and a second branch. A trigger of the first branch is coupled to a low voltage input, an inverted high voltage output and a ground. A latch of the first branch is coupled to the inverted high voltage output and a high voltage output. A power gate of the first branch is coupled to an inverted low voltage input, the latch of the first branch and a high voltage supply. A trigger of the second branch is coupled to the inverted low voltage input, the high voltage output and the ground. A latch of the second branch is coupled to the high voltage output and the inverted high voltage output. A power gate of the second branch is coupled to the low voltage input, the latch of the second branch and the high voltage supply.

摘要翻译： 电平移位器包括第一分支和第二分支。 第一分支的触发器耦合到低电压输入，反相高压输出和地。 第一分支的锁存器耦合到反相高压输出和高电压输出。 第一分支的功率门耦合到反相低电压输入，第一分支的锁存器和高电压电源。 第二分支的触发器耦合到反相低压输入，高压输出和地。 第二分支的锁存器耦合到高压输出和反相高压输出。 第二分支的电源门耦合到低电压输入，第二分支的锁存器和高电压电源。